NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ

NPN Resistor-Equipped Transistor (RET) in a leadless ultra small DFN1006B-3 (SOT883B) Surface-Mounted Device (SMD) plastic package. PNP complement: PDTA115EMB. ? 20 mA output current capability\n? Reduces component count\n? Built-in bias resistors\n? Reduces pick and place costs\n? Simplifies circuit design\n? AEC-Q101 qualified\n? Leadless ultra small SMD plastic package\n? Low package height of 0.37 mm;

Nexperia

安世

絲?。?a target="_blank" title="Marking" href="/00110001/marking.html">00110001；Package：DFN1006B-3；NPN resistor-equipped transistor; R1 = 100 k廓, R2 = 100 k廓

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NEXPERIA

安世

Package：3-XFDFN；包裝：卷帶（TR） 類別：分立半導(dǎo)體產(chǎn)品 晶體管 - 雙極（BJT）- 單，預(yù)偏置 描述：TRANS PREBIAS NPN 50V DFN1006B-3

Nexperia USA Inc.

NPN resistor-equipped transistors; R1 = 100 kW, R2 = 100 kW

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PHI

PHI

PNP resistor-equipped transistors; R1 = 100 kW, R2 = 100 kW

PNP resistor-equipped transistors; R1 = 100 k?, R2 = 100 k? DESCRIPTION PNP resistor-equipped transistor (see “Simplified outline, symbol and pinning” for package details). FEATURES ? Built-in bias resistors ? Simplified circuit design ? Reduction of component count ? Re

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PHI

PHI