CK00 100/133 MHz spread spectrum differential system clock generator

DESCRIPTION The PCK2021 is a clock synthesizer/driver for a Pentium III? and other similar processors. The PCK2021 has six differential pair CPU current source outputs, two 33 MHz outputs, one 3V66 output, and two 48 MHz clocks which can be disabled on power-up, and one 3.3 V reference clock at

文件：108.43 Kbytes 頁數(shù)：15 Pages

PHI

PHI

CK00 100/133 MHz spread spectrum differential system clock generator

DESCRIPTION The PCK2021 is a clock synthesizer/driver for a Pentium III? and other similar processors. The PCK2021 has six differential pair CPU current source outputs, two 33 MHz outputs, one 3V66 output, and two 48 MHz clocks which can be disabled on power-up, and one 3.3 V reference clock at

文件：108.43 Kbytes 頁數(shù)：15 Pages

PHI

PHI

CK00 100/133 MHz spread spectrum differential system clock generator

DESCRIPTION The PCK2021 is a clock synthesizer/driver for a Pentium III? and other similar processors. The PCK2021 has six differential pair CPU current source outputs, two 33 MHz outputs, one 3V66 output, and two 48 MHz clocks which can be disabled on power-up, and one 3.3 V reference clock at

文件：108.43 Kbytes 頁數(shù)：15 Pages

PHI

PHI

PCK2021DGG

Overview

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CK00 (100/133 MHz) spread spectrum differential system clock generator

OverviewThe PCK2021 is a clock synthesizer/driver for a Pentium IIITMand other similar processors.\n The PCK2021 has six differential pair CPU current source outputs, two 33 MHz outputs, one 3V66 output, and two 48 MHz clocks which can be disabled on power-up, and one 3.3 V reference clock at 14.318 \n\n?3.3 V operation\n\n?Six differential CPU clock pairs\n\n?Two PCI clocks at 33 MHz and one 3V66 clock\n\n?Two 48 MHz clocks at 3.3 V\n\n?One 14.318 MHz reference clock\n\n?Power management control pins\n\n?Host clock jitter less than 200 ps cycle-to-cycle\n\n?Host clock skew less than 150 ps pin;

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