Clock and calendar with 240 x 8-bit RAM

GENERAL DESCRIPTION The PCF8583 is a clock/calendar circuit based on a 2048-bit static CMOS RAM organized as 256 words by 8 bits. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each written

文件：595.61 Kbytes 頁數(shù)：37 Pages

PHI

PHI

Clock and calendar with 240 x 8-bit RAM

General description The PCF8583 is a clock and calendar chip, based on a 2048 bit static CMOS1 RAM organized as 256 words by 8 bits. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each writt

文件：595.61 Kbytes 頁數(shù)：37 Pages

恩XP

Clock and calendar with 240 X 8-bit RAM

General description The PCF8583 is a clock and calendar chip, based on a 2048 bit static CMOS1 RAM organized as 256 words by 8 bits. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each writt

文件：595.61 Kbytes 頁數(shù)：37 Pages

恩XP

Clock/calendar with 240 X 8-bit RAM

1 FEATURES · I2C-bus interface operating supply voltage: 2.5 V to 6 V · Clock operating supply voltage (0 to +70 °C): 1.0 V to 6.0 V · 240 ′ 8-bit low-voltage RAM · Data retention voltage: 1.0 V to 6 V · Operating current (at fSCL = 0 Hz): max. 50 mA · Clock function with four year calendar

文件：371.77 Kbytes 頁數(shù)：26 Pages

SYC

Clock/calendar with 240 x 8-bit RAM

GENERAL DESCRIPTION The PCF8583 is a clock/calendar circuit based on a 2048-bit static CMOS RAM organized as 256 words by 8 bits. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each written

文件：162.2 Kbytes 頁數(shù)：28 Pages

PHI

PHI

Clock and calendar with 240 x 8-bit RAM

文件：595.61 Kbytes 頁數(shù)：37 Pages

PHI

PHI

帶240 x 8位RAM的時鐘和日歷

The PCF8583 is a clock and calendar chip, based on a 2048 bit static CMOS1 RAM organized as 256 words by 8 bits. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each written or read data byte. A I2C-bus interface operating supply voltage: 2.5 V to 6 V\nClock operating supply voltage 1.0 V to 6.0 V at 0 ℃ to +70 ℃\n240 × 8-bit low-voltage RAM\nData retention voltage: 1.0 V to 6.0 V\nOperating current (at fSCL = 0 Hz): max 50 μA\nClock function with four year calendar\nUniversal timer with al;

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