4-channel ultra-low voltage, Fm+ I2C-bus switch with reset

\nThe PCA9846 is an ultra-low voltage, quad bidirectional translating switch controlled via the\n\t\t\t\tI2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or\n\t\t\tchannels. Any or all SCx/SDx channels can be selected, determined by the programmable\n\t\t\tcontrol register. This \n\n\n\t\t\t\t\tUltra-low voltage operation, down to 0.8 V to interface with next-generation CPUs\n\t\t\t\t\n\n\n\t\t\t\t1-of-4 bidirectional translating switch\n\t\t\t\n\n\n\t\t\t\tFm+ I2C-bus interface logic; compatible with SMBus standards\n\t\t\t\n\n\n\t\t\t\t2 address pins allowing up to 16 dev;

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4-channel ultra-low voltage, Fm I2C-bus switch with reset

文件：961.89 Kbytes 頁數(shù)：32 Pages

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WAVEGUIDE END LAUNCH TO SMA TYPE FEMALE FREQUENCY RANGE: 12,40 TO 18,00

文件：76.04 Kbytes 頁數(shù)：1 Pages

PASTERNACK

Complete 10-Bit 30 MSPS CCD Signal Processor

PRODUCT DESCRIPTION The AD9846A is a complete analog signal processor for CCD applications. It features a 30 MHz single-channel architecture designed to sample and condition the outputs of interlaced and progressive scan area CCD arrays. The AD9846A’s signal chain consists of an input clamp, corr

文件：231.12 Kbytes 頁數(shù)：24 Pages

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Complete 10-Bit 30 MSPS CCD Signal Processor

PRODUCT DESCRIPTION The AD9846A is a complete analog signal processor for CCD applications. It features a 30 MHz single-channel architecture designed to sample and condition the outputs of interlaced and progressive scan area CCD arrays. The AD9846A’s signal chain consists of an input clamp, corr

文件：231.12 Kbytes 頁數(shù)：24 Pages

AD

亞德諾

Complete 10-Bit 30 MSPS CCD Signal Processor

PRODUCT DESCRIPTION The AD9846A is a complete analog signal processor for CCD applications. It features a 30 MHz single-channel architecture designed to sample and condition the outputs of interlaced and progressive scan area CCD arrays. The AD9846A’s signal chain consists of an input clamp, corr

文件：231.12 Kbytes 頁數(shù)：24 Pages

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