4-channel I2C switch with interrupt logic and reset

General description The PCA9545A is a quad bi-directional translating switch controlled via the I2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programma

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PHI

PHI

4-channel I2C-bus switch with interrupt logic and reset

General description The PCA9545A/45B/45C is a quad bidirectional translating switch controlled via the I2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the pr

文件：160.54 Kbytes 頁(yè)數(shù)：28 Pages

恩XP

絲?。?a target="_blank" title="Marking" href="/9545a/marking.html">9545A；Package：HVQFN20；4-channel I2C-bus switch with interrupt logic and reset

General description The PCA9545A is a quad bidirectional translating switch controlled via the I2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the program

文件：455.33 Kbytes 頁(yè)數(shù)：33 Pages

恩XP

4-channel I2C-bus switch with interrupt logic and reset

General description The PCA9545A is a quad bidirectional translating switch controlled via the I2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the program

文件：455.33 Kbytes 頁(yè)數(shù)：33 Pages

恩XP

4-channel I2C-bus switch with interrupt logic and reset

The PCA9545A/45B/45C is a quad bidirectional translating switch controlled via theI2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Anyindividual SCx/SDx channel or combination of channels can be selected, determined bythe contents of the programmable control registe 1-of-4 bidirectional translating switches\nI2C-bus interface logic; compatible with SMBus standards\n4 active LOW interrupt inputs\nActive LOW interrupt output\nActive LOW reset input\n2 address pins allowing up to 4 devices on the I2C-bus\nAlternate address versions A, B and C allow up to a total o;

恩XP