I2C-bus repeater

General description The PCA9515A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus ena

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I2C-bus repeater

General description The PCA9515A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus ena

文件：222.7 Kbytes 頁數(shù)：20 Pages

恩XP

I2C-bus repeater

General description The PCA9515A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus ena

文件：222.7 Kbytes 頁數(shù)：20 Pages

恩XP

I2C-bus repeater

The PCA9515A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems.\nWhile retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 2-channel, bidirectional buffer\nI2C-bus and SMBus compatible\nActive HIGH repeater enable input\nOpen-drain input/outputs\nLock-up free operation\nSupports arbitration and clock stretching across the repeater\nAccommodates Standard-mode and Fast-mode I2C-bus devices and multiple masters\nPowered-of;

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