絲印：P04；Package：SC-74A；Low-power inverter

1. General description The 74AUP1G04 is a single inverter. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire

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NEXPERIA

安世

絲?。?strong>p04；Package：SC-74A；Low-power inverter

1. General description The 74AUP1G04-Q100 is a single inverter. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the en

文件：260.81 Kbytes 頁數(shù)：16 Pages

NEXPERIA

安世

絲?。?strong>p04；Package：SOT765-1；Low-power triple inverter

1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic

文件：255.99 Kbytes 頁數(shù)：17 Pages

NEXPERIA

安世

絲印：p04；Package：SOT833-1；Low-power triple inverter

1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic

文件：255.99 Kbytes 頁數(shù)：17 Pages

NEXPERIA

安世

絲?。?strong>P04；Package：SOT523；PNP PRE-BIASED SMALL SIGNAL SURFACE MOUNT TRANSISTOR

Features - Epitaxial Planar Die Construction - Complementary NPN Types Available (DDTC) - Built-In Biasing Resistors, R1 ??R2 - Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) - Halogen and Antimony Free. “Green” Device (Note 3) - Qualified to AEC-Q101 Standards for High Reliability

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DIODES

美臺(tái)半導(dǎo)體

絲?。?strong>P04；Package：SC-88A；TinyLogic ULP-A Inverter

The NC7SP04 is a single inverter in tiny footprint packages. The device is designed to operate for VCC = 0.9 V to 3.6 V. Features ? Designed for 0.9 V to 3.6 V VCC Operation ? 2.9 ns tPD at 3.3 V (Typ) ? Inputs/Outputs Over?Voltage Tolerant up to 3.6 V ? IOFF Supports Partial Power Down Prot

文件：351.17 Kbytes 頁數(shù)：11 Pages

ONSEMI

安森美半導(dǎo)體

絲印：P04；Package：SOT-23；P-Channel JFET Switch

FEATURES ? Low Insertion Loss ? No Offset or Error Generated By Closed Switch - Purely Resistive - High Isolation Resistance From Driver ? Short Sample and Hold Aperture Time ? Fast Switching APPLICATIONS ? Analog Switches ? Choppers ? Commutators

文件：23.88 Kbytes 頁數(shù)：2 Pages

CALOGIC

絲?。?strong>p04；Package：TSSOP5；Low-power inverter

文件：700.4 Kbytes 頁數(shù)：16 Pages

NEXPERIA

安世

絲?。?a target="_blank" title="Marking" href="/p040bh/marking.html">P040BH；Package：HSMT8；Nch 100V 40A Power MOSFET

Features 1) Low on - resistance 2) High power package (HSMT8) 3) Pb-free plating ; RoHS compliant 4) Halogen free 5) 100 Rg and UIS tested Application Switching

文件：2.30763 Mbytes 頁數(shù)：10 Pages

ROHM

羅姆

絲?。?a target="_blank" title="Marking" href="/p04bbk/marking.html">P04BBK；Package：DFN3333T8LSAB；Nch 100V 40A Power MOSFET

Features 1) Wettable Flanks Product 2) AEC-Q101 Qualified 3) 100% Avalanche tested Application ADAS/Info./Lighting/Body

文件：3.14578 Mbytes 頁數(shù)：14 Pages

ROHM

羅姆