絲?。?strong>p00；Package：SOT765-1；Low-power dual 2-input NAND gate

1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption acr

文件：302.02 Kbytes 頁(yè)數(shù)：20 Pages

NEXPERIA

安世

絲?。?strong>p00；Package：SOT765-1；Low-power dual 2-input NAND gate

1. General description The 74AUP2G00-Q100 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumptio

文件：223.57 Kbytes 頁(yè)數(shù)：13 Pages

NEXPERIA

安世

絲印：p00；Package：SOT902-2；Low-power dual 2-input NAND gate

1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption acr

文件：302.02 Kbytes 頁(yè)數(shù)：20 Pages

NEXPERIA

安世

絲?。?strong>p00；Package：SOT833-1；Low-power dual 2-input NAND gate

1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption acr

文件：302.02 Kbytes 頁(yè)數(shù)：20 Pages

NEXPERIA

安世

絲?。?strong>P00；Package：SC-88A；TinyLogic ULP-A NAND Gate

The NC7SP00 is a single 2?input NAND gate in tiny footprint packages. The device is designed to operate for VCC = 0.9 V to 3.6 V. Features ? Designed for 0.9 V to 3.6 V VCC Operation ? 2.4 ns tPD at 3.3 V (Typ) ? Inputs/Outputs Over?Voltage Tolerant up to 3.6 V ? IOFF Supports Partial Power

文件：170.02 Kbytes 頁(yè)數(shù)：8 Pages

ONSEMI

安森美半導(dǎo)體

絲印：P00；Package：MAA05A；TinyLogic
ULP 2-Input NAND Gate

文件：391.46 Kbytes 頁(yè)數(shù)：11 Pages

ONSEMI

安森美半導(dǎo)體

絲?。?a target="_blank" title="Marking" href="/p0048/marking.html">P0048；Package：TO220；N-Ch 100V Fast Switching MOSFETs

Description The FKP0048 is the high cell density trenched N-ch MOSFETs, which provide excellent RDSON and gate charge for most of the Synchronous Rectification for AC/DC Quick Charger.

文件：846.39 Kbytes 頁(yè)數(shù)：6 Pages

FETEK

臺(tái)灣東沅

絲?。?a target="_blank" title="Marking" href="/p0080ea/marking.html">P0080EA；Package：TO-92；Thyristor Surge Suppressors (TSS)

Features and Benefits Low voltage overshoot Low on-state voltage Does not degrade surge capability after multiple surge events within limit Fails short circuit when surged in excess of ratings Low Capacitance

文件：2.82579 Mbytes 頁(yè)數(shù)：6 Pages

UNSEMI

優(yōu)恩半導(dǎo)體

絲印：P0080EB；Package：TO-92；Thyristor Surge Suppressors (TSS)

Features and Benefits Low voltage overshoot Low on-state voltage Does not degrade surge capability after multiple surge events within limit Fails short circuit when surged in excess of ratings Low Capacitance

文件：2.82166 Mbytes 頁(yè)數(shù)：6 Pages

UNSEMI

優(yōu)恩半導(dǎo)體

絲?。?a target="_blank" title="Marking" href="/p0080ec/marking.html">P0080EC；Package：TO-92；Thyristor Surge Suppressors (TSS)

Features and Benefits Low voltage overshoot Low on-state voltage Does not degrade surge capability after multiple surge events within limit Fails short circuit when surged in excess of ratings Low Capacitance

文件：2.82987 Mbytes 頁(yè)數(shù)：6 Pages

UNSEMI

優(yōu)恩半導(dǎo)體