2K-Bit Standard 2-Wire Bus

General Description The NM24C02/03 devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements. Features ■ Extend

文件：104.54 Kbytes 頁數(shù)：14 Pages

FAIRCHILD

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2K-Bit Standard 2-Wire Bus

General Description The NM24C02/03 devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements. Features ■ Extend

文件：104.54 Kbytes 頁數(shù)：14 Pages

FAIRCHILD

仙童半導(dǎo)體

2K-Bit Standard 2-Wire Bus

General Description The NM24C02/03 devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements. Features ■ Extend

文件：104.54 Kbytes 頁數(shù)：14 Pages

FAIRCHILD

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2K-Bit Serial EEPROM 2-Wire Bus Interface

General Description The NM24C02U/NM24C03U are 2K (2,048) bit serial interface CMOS EEPROMs (Electrically Erasable Programmable Read Only Memory). These devices fully conform to the Standard I2C? 2-wire protocol which uses Clock (SCL) and Data I/O (SDA) pins to synchronously clock data between the

文件：99.31 Kbytes 頁數(shù)：13 Pages

FAIRCHILD

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2K-Bit Serial EEPROM 2-Wire Bus Interface

General Description The NM24C02U/NM24C03U are 2K (2,048) bit serial interface CMOS EEPROMs (Electrically Erasable Programmable Read Only Memory). These devices fully conform to the Standard I2C? 2-wire protocol which uses Clock (SCL) and Data I/O (SDA) pins to synchronously clock data between the

文件：99.31 Kbytes 頁數(shù)：13 Pages

FAIRCHILD

仙童半導(dǎo)體

2K-Bit Serial EEPROM 2-Wire Bus Interface

General Description The NM24C02U/NM24C03U are 2K (2,048) bit serial interface CMOS EEPROMs (Electrically Erasable Programmable Read Only Memory). These devices fully conform to the Standard I2C? 2-wire protocol which uses Clock (SCL) and Data I/O (SDA) pins to synchronously clock data between the

文件：99.31 Kbytes 頁數(shù)：13 Pages

FAIRCHILD

仙童半導(dǎo)體

2K-Bit Standard 2-Wire Bus

General Description The NM24C02/03 devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements. Features ■ Extend

文件：104.54 Kbytes 頁數(shù)：14 Pages

FAIRCHILD

仙童半導(dǎo)體

2K-Bit Standard 2-Wire Bus

General Description The NM24C02/03 devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements. Features ■ Extend

文件：104.54 Kbytes 頁數(shù)：14 Pages

FAIRCHILD

仙童半導(dǎo)體

2K-Bit Standard 2-Wire Bus

General Description The NM24C02/03 devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements. Features ■ Extend

文件：104.54 Kbytes 頁數(shù)：14 Pages

FAIRCHILD

仙童半導(dǎo)體

Package：8-DIP（0.300"，7.62mm）；包裝：卷帶（TR）剪切帶（CT） 類別：集成電路（IC） 存儲器 描述：IC EEPROM 2KBIT I2C 100KHZ 8DIP

ONSEMI

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