P-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description These P -Channel logic level enhancement mode power field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly sui

文件：78.57 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

P-Channel MOSFET

■ Features ● VDS (V) =-30V ● ID =-0.9 A (VGS =-4.5V) ● RDS(ON)

文件：1.69978 Mbytes 頁數(shù)：5 Pages

KEXIN

科信電子

絲印：352A；Package：SOT-23-3；P-Channel Logic Level Enhancement Mode Field Effect Transistor

文件：271.06 Kbytes 頁數(shù)：9 Pages

ONSEMI

安森美半導(dǎo)體

P-Channel 30 V (D-S) MOSFET

文件：1.047849 Mbytes 頁數(shù)：9 Pages

VBSEMI

微碧半導(dǎo)體

P 溝道邏輯電平增強型場效應(yīng)晶體管，-30V，-0.9A，300mΩ

這些P溝道邏輯電平增強型功率場效應(yīng)晶體管采用飛兆專有的高密度、DMOS技術(shù)生產(chǎn)。 這種密度非常高的工藝是專為最大限度地降低導(dǎo)通阻抗而定制的。 這些器件特別適合筆記本電腦電源管理、便攜電子產(chǎn)品及其他電池供電電路等低電壓應(yīng)用，此類應(yīng)用需要在很小尺寸的表面貼裝封裝中實現(xiàn)快速高側(cè)開關(guān)和低線內(nèi)功率損耗。 ? -0.9 A, -30 VrDS(ON) = 0.5 Ω @ VGS = -4.5 VrDS(ON) = 0.3 Ω @ VGS = -10 V\n? Industry Standard Outline SOT-23 Surface Mount Package Using Proprietary SuperSOT?-3 Design for Superior Thermal and Electrical Capabilities.\n? High Density Cell Design for Extremely Low rDS(ON)\n? Exceptional On-Resistan;

ONSEMI

安森美半導(dǎo)體

Trans MOSFET P-CH 30V 0.9A 3-Pin SuperSOT T/R

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