N-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly sui

文件：59.64 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

絲?。?a target="_blank" title="Marking" href="/a2shb/marking.html">A2SHB；Package：SOT-23；N-Channel Enhancement Mode MOSFET

General Features VDS = 20V ID =2.3 A RDS(ON)

文件：1.45725 Mbytes 頁數(shù)：5 Pages

EVVOSEMI

翊歐

絲印：331M；Package：SOT-23-3；N-Channel Logic Level Enhancement Mode Field Effect Transistor

文件：280.65 Kbytes 頁數(shù)：9 Pages

ONSEMI

安森美半導(dǎo)體

N-Channel 20 V (D-S) MOSFET

FEATURES ? Halogen-free According to IEC 61249-2-21 Definition ? TrenchFET? Power MOSFET ? 100 Rg Tested ? Compliant to RoHS Directive 2002/95/EC APPLICATIONS ? DC/DC Converters ? Load Switch for Portable Applications

文件：1.04841 Mbytes 頁數(shù)：9 Pages

VBSEMI

微碧半導(dǎo)體

N 溝道邏輯電平增強型場效應(yīng)晶體管，20V，1.3A，0.21Ω

這些N溝道邏輯電平增強模式場效應(yīng)晶體管采用飛兆專有的高單元密度、DMOS技術(shù)生產(chǎn)。 這種密度非常高的工藝是專為最大限度地降低導(dǎo)通阻抗而定制的。 此類器件特別適合筆記本電腦、便攜電話、PCMCIA卡等低電壓應(yīng)用及其他需要采用極小封裝外形表面貼裝封裝、具有快速開關(guān)和低線內(nèi)功率損耗的電池供電電路。 ?1.3 A，20 V。 RDS(ON) = 0.21 Ω @ VGS = 2.7 V RDS(ON) = 0.16 Ω @ VGS = 4.5 V\n?采用專有SuperSOT?-3技術(shù)設(shè)計的工業(yè)標(biāo)準(zhǔn)SOT-23表面貼裝封裝，可實現(xiàn)卓越的熱性能和電氣性能\n?高密度設(shè)計可實現(xiàn)極低的RDS(ON)\n?出色的導(dǎo)通阻抗和最大DC電流能力;

ONSEMI

安森美半導(dǎo)體