16-bit serial/parallel-in, serial-out shift register 3-State

DESCRIPTION The 74F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the mode (M) input is High, information present on the parallel data (D0–D15) inputs is entered on the falling edge of the clock pulse (CP) input signal. When M is Low,

文件：87.95 Kbytes 頁(yè)數(shù)：10 Pages

PHI

PHI

16-bit serial/parallel-in, serial-out shift register (3-State)

DESCRIPTION\nThe 74F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the mode (M) input is High, information present on the parallel data (D0–D15) inputs is entered on the falling edge of the clock pulse (CP) input signal. When M is Low, data ? 16-bit parallel-to-serial conversion\n? Chip select control\n? Shift frequency 110MHz tyical\n? Available in 300mil-wide 24-pin Slim DIP package?;

恩XP

16-bit serial/parallel-in, serial-out shift register 3-State

DESCRIPTION The 74F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the mode (M) input is High, information present on the parallel data (D0–D15) inputs is entered on the falling edge of the clock pulse (CP) input signal. When M is Low,

文件：87.95 Kbytes 頁(yè)數(shù)：10 Pages

PHI

PHI

16-Bit Serial/Parallel-In, Serial-Out Shift Register

General Description The 74F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the Mode (M) input is HIGH, information present on the parallel data (P0–P15) inputs is entered on the falling edge of the Clock Pulse (CP) input signal. When M is

文件：57.4 Kbytes 頁(yè)數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

16-bit serial/parallel-in, serial-out shift register 3-State

DESCRIPTION The 74F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the mode (M) input is High, information present on the parallel data (D0–D15) inputs is entered on the falling edge of the clock pulse (CP) input signal. When M is Low,

文件：87.95 Kbytes 頁(yè)數(shù)：10 Pages

PHI

PHI

16-Bit Serial/Parallel-In, Serial-Out Shift Register

文件：68.99 Kbytes 頁(yè)數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體