Up/down binary counter with reset and ripple clock

DESCRIPTION The 74F191 is a 4-bit binary counter. It contains four edge-triggered master/slave flip-flops with internal gating and steering logic to provide asynchronous preset and synchronous count-up and count-down operations. FEATURES ? High speed –125MHz typical fMAX ? Synchronous, reversi

文件：104 Kbytes 頁數(shù)：14 Pages

PHI

PHI

Up/down binary counter with reset and ripple clock

恩XP

Up/down binary counter with reset and ripple clock

DESCRIPTION The 74F191 is a 4-bit binary counter. It contains four edge-triggered master/slave flip-flops with internal gating and steering logic to provide asynchronous preset and synchronous count-up and count-down operations. FEATURES ? High speed –125MHz typical fMAX ? Synchronous, reversi

文件：104 Kbytes 頁數(shù)：14 Pages

PHI

PHI

Up/Down Binary Counter with Preset and Ripple Clock

文件：196.68 Kbytes 頁數(shù)：10 Pages

NSC

國半

Up/down binary counter with reset and ripple clock

DESCRIPTION The 74F191 is a 4-bit binary counter. It contains four edge-triggered master/slave flip-flops with internal gating and steering logic to provide asynchronous preset and synchronous count-up and count-down operations. FEATURES ? High speed –125MHz typical fMAX ? Synchronous, reversi

文件：104 Kbytes 頁數(shù)：14 Pages

PHI

PHI

Up/Down Binary Counter with Preset and Ripple Clock

General Description The 74F191 is a reversible modulo-16 binary counter featuring synchronous counting and asynchronous presetting. The preset feature allows the 74F191 to be used in programmable dividers. The Count Enable input, the Terminal Count output and Ripple Clock output make possible a v

文件：77.02 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體