Isolated 2W SM 2:1 Input Single Output DC/DC Converters

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MURATA

村田

.156 HEADER & HOUSING .156 [3.96] CENTERLINE

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ADAM-TECH

亞當(dāng)科技

Octal Buffer/Line Driver with 3-STATE Outputs

General Description The VHCT540A is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The VHCT540A is an octal buffer/line driv

文件：100.19 Kbytes 頁(yè)數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體

Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

General Description The LVX240 is an octal inverting buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. The inputs tolerate up to 7V allowing interface of 5V systems to 3V syste

文件：87.82 Kbytes 頁(yè)數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs with 26ohm Series Resistors in the Outputs

General Description The LCX2244 contains eight non-inverting buffers with 3-STATE outputs. The device may be employed as a memory address driver, clock driver and bus-oriented transmitter/receiver. The LCX2244 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfac

文件：156.24 Kbytes 頁(yè)數(shù)：11 Pages

FAIRCHILD

仙童半導(dǎo)體

8-Bit Magnitude Comparator (Equality Detector)

General Description The MM74HC688 equality detector utilizes advanced silicon-gate CMOS technology to compare bit for bit two 8-bit words and indicates whether or not they are equal. The P Q output indicates equality when it is LOW. A single active low enable is provided to facilitate cascading

文件：99.56 Kbytes 頁(yè)數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體

Octal Transparent Latch with 3-STATE Outputs

General Description The AC/ACT373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Out

文件：122.18 Kbytes 頁(yè)數(shù)：10 Pages

FAIRCHILD

仙童半導(dǎo)體

Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

General Description The LCX574 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. The LCX574 is functionally identic

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FAIRCHILD

仙童半導(dǎo)體

Octal Bi-Directional Transceiver with 3-STATE Outputs

General Description The ABT245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 64 mA on both the A and B ports. Features ■Bidirectional non-inverting buffers ■A and B output sink capa

文件：132.75 Kbytes 頁(yè)數(shù)：11 Pages

FAIRCHILD

仙童半導(dǎo)體

PCI/USB ADSL CHIPSET

DESCRIPTION The Unicorn II chipset is designed to simplify the development of low-cost ADSL CPE modems for Windows, Mac and Linux based environments and enables manufacturers to achieve a very competitive production cost. Due to its controller-less architecture and particularly the advantage th

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STMICROELECTRONICS

意法半導(dǎo)體