Multitrunk System Synchronizer

Description The MT9042C Multitrunk System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9042C generates ST-BUS clock and framing signals that are phase locked to eith

文件：113.6 Kbytes 頁數(shù)：28 Pages

MITEL

Multitrunk System Synchronizer

Description The MT9042C Multitrunk System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9042C generates ST-BUS clock and framing signals that are phase locked to eith

文件：113.6 Kbytes 頁數(shù)：28 Pages

MITEL

Multitrunk System Synchronizer

Description\nThe MT9042C Multitrunk System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links.\nThe MT9042C generates ST-BUS clock and framing signals that are phase locked to either a 2

Mitel

Dual reference frequency selectable Digital PLL with multiple clock outputs for T1/E1 (ITU-T G.812 type IV) and Stratum ( 3, 4, 4E) applications

Microchip

微芯科技

MT9042C

Microchip

微芯科技

Package：28-LCC（J 形引線）；包裝：托盤 功能：數(shù)字鎖相環(huán) 類別：集成電路（IC） 電信 描述：IC TELECOM INTERFACE 28PLCC

MICROCHIP

微芯科技

Package：28-LCC（J 形引線）；包裝：托盤 功能：數(shù)字鎖相環(huán) 類別：集成電路（IC） 電信 描述：IC TELECOM INTERFACE 28PLCC

MICROCHIP

微芯科技