Dual FIFO (262,214 Words ? 8 Bits) ? 2

GENERAL DESCRIPTION The MS81V04166 is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories is connected in common, and

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Dual FIFO (262,214 Words ×8 Bits) × 2

GENERAL DESCRIPTION\nThe MS81V04166 is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation.\nThe read clock of each of the 2Mb FIFO memories is connected in common, and the c ? 512 rows ×512 columns ×8 bits ×2\n? Fast FIFO (First-In First-Out) Operation: 25 ns cycle time\n? Self refresh (No refresh control is required)\n? High speed asynchronous serial access\nRead/Write Cycle Time 25 ns/30 ns/40 ns\nAccess Time 23 ns/30 ns/35 ns\n? Variable length delay bit (600 to 2622;

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Dual FIFO (262,214 Words ? 8 Bits) ? 2

GENERAL DESCRIPTION The MS81V04166A is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories isconnected in common, and th

文件：144.9 Kbytes 頁數(shù)：19 Pages

OKIOki Electric Cable Co.,Ltd

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Dual FIFO (262,214 Words ? 8 Bits) ? 2

GENERAL DESCRIPTION The MS81V04166A is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories isconnected in common, and th

文件：144.9 Kbytes 頁數(shù)：19 Pages

OKIOki Electric Cable Co.,Ltd

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Dual FIFO (262,214 Words ? 8 Bits) ? 2

GENERAL DESCRIPTION The MS81V04166 is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories is connected in common, and

文件：139.24 Kbytes 頁數(shù)：19 Pages

OKIOki Electric Cable Co.,Ltd

沖電線日本沖電線株式會社

Dual FIFO (262,214 Words ? 8 Bits) ? 2

文件：178.83 Kbytes 頁數(shù)：24 Pages

OKIOki Electric Cable Co.,Ltd

沖電線日本沖電線株式會社

Dual FIFO

GENERAL DESCRIPTION\nThe MS81V04166A is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories isconnected in common, and the cl ?262,214 words ×8 bits ×2\n? Fast FIFO (First-In First-Out) Operation: 25 ns cycle time\n? Self refresh (No refreshcontrol is required)\n? High speed asynchronous serial access\n?Read/Write Cycle Time? 20 ns/25 ns\n?Access Time?? 18 ns/23 ns\n? Variable length delay bit (150 to 262214)\n? Write mask;

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