3.3V / 2,5V 1:14 LVCMOS PLL CLOCK GENERATOR

3.3V/2.5V 1:14 LVCMOS PLL Clock Generator The MPC9774 is a 3.3V or 2.5V compatible, 1:14 PLL based clock generator targeted for high performance low-skew clock distribution in mid-range to high-performance networking, computing and telecom applications. With output frequencies up to 125 MHz and o

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MOTOROLA

摩托羅拉

1:14 LVCMOS Clock Generator

The MPC9774 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9774 requires the connection of the PLL feedback output QFB to feedback input FB_IN to close the PLL feedback path. The reference clock frequency and the divider for the feedba 1:14 PLL based low-voltage clock generator\n3.3V power supply\nInternal power–on reset\nGenerates clock signals up to 125 MHz\nMaximum output skew of 175 ps\nTwo LVCMOS PLL reference clock inputs\nExternal PLL feedback supports zero-delay capability\nVarious feedback and output dividers (see applica;

Renesas

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IC PLL CLK GEN 1:14 3.3V 52-LQFP

Renesas

瑞薩

Package：52-LQFP；包裝：卷帶（TR） 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC PLL CLK GEN 1:14 3.3V 52-LQFP

Renesas Electronics America Inc

Package：52-LQFP；包裝：卷帶（TR） 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC PLL CLK GEN 1:14 3.3V 52-LQFP

Renesas Electronics America Inc

Package：52-LQFP；包裝：卷帶（TR） 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC PLL CLK GEN 1:14 3.3V 52-LQFP

Renesas Electronics America Inc