3.3 V/2.5 V 1:15 PECL/LVCMOS Clock Fanout Buffer High-impedance output control

The MPC9449 is a 3.3 V or 2.5 V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less than 200 ps the device meets the needs of the most demanding clock applications. Features ? 15 LVCMOS compatible

文件：358.28 Kbytes 頁數(shù)：11 Pages

IDT

3.3V / 2.5 V 1:15 PECL/LVCMOS

The MPC9449 is a 3.3V or 2.5V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less than 200 ps the device meets the needs of the most demanding clock applications. Features ? 15 LVCMOS compatible c

文件：293.63 Kbytes 頁數(shù)：12 Pages

MOTOROLA

摩托羅拉

3.3 V/2.5 V 1:15 PECL/LVCMOS Clock Fanout Buffer

The MPC9449 is a 3.3 V or 2.5 V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less than 200 ps the device meets the needs of the most demanding clock applications. Features ? 15 LVCMOS compati

文件：583.59 Kbytes 頁數(shù)：12 Pages

RENESAS

瑞薩

3.3V/2.5V 1:15 PECL/LVCMOS Clock Fanout Buffer

The MPC9449 is a 3.3 V or 2.5 V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less than 200 ps the device meets the needs of the most demanding clock applications. 15 LVCMOS compatible clock outputs\nTwo selectable LVCMOS and one differential LVPECL compatible clock inputs\nSelectable output frequency divider (divide-by-one and divide-by-two)\nMaximum clock frequency of 200 MHz\nMaximum clock skew of 200 ps\nHigh-impedance output control\n3.3 V or 2.5 V power ;

Renesas

瑞薩

3.3V/2.5V 1:15 PECL/LVCMOS Clock Fanout Buffer

The MPC9449 is a 3.3V or 2.5V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less than 200 ps the device meets the needs of the most demanding clock applications. ? 15 LVCMOS compatible clock outputs\n? Two selectable LVCMOS and one differential LVPECL compatible clock inputs\n? Selectable output frequency divider (divide-by-one and divide-by-two)\n? Maximum clock frequency of 200 MHz\n? Maximum clock skew of 200 ps\n? High-impedance output control\n? 3.3V or;

恩XP

Package：52-LQFP；包裝：管件 類別：集成電路（IC） 時(shí)鐘緩沖器，驅(qū)動(dòng)器 描述：IC CLK BUFFER 3:15 200MHZ 52TQFP

Renesas Electronics America Inc

Package：52-LQFP；包裝：管件 類別：集成電路（IC） 時(shí)鐘緩沖器，驅(qū)動(dòng)器 描述：IC CLK BUFFER 3:15 200MHZ 52TQFP

Renesas Electronics America Inc