Security Processor

Typical System Architecture The MPC185 is designed to integrate easily into any system using the 60x bus protocol. It is ideal in any system using a Motorola PowerQUICC II communications processor (as shown in Figure 4-1) or a PowerPC-architectured processor and memory controller. The ability of

文件：227.37 Kbytes 頁(yè)數(shù)：12 Pages

MOTOROLA

摩托羅拉

Security Processor

Overview The MPC185 security processor is a powerful addition to any networking or computing system supporting the 60x bus protocol. It is designed to off-load computational intensive security functions, such as key generation and exchange, authentication and bulk encryption from processors such as \n\t?2 Public key execution units (PKEUs) that support the following:\n\t\t\n\t\t\t?RSA and Diffie-Hellman\n\n\t\t\t?Programmable field size up to 2048 bits\n\n\t\t\t?Elliptic curve cryptography\n\n\t\t\t?F2m and F(p) modes\n\n\t\t\t?Programmable field size up to 511 bits\n\n\t\t\n\t\n\n\t?2 Data En;

恩XP

Security Processor

Typical System Architecture The MPC185 is designed to integrate easily into any system using the 60x bus protocol. It is ideal in any system using a Motorola PowerQUICC II communications processor (as shown in Figure 4-1) or a PowerPC-architectured processor and memory controller. The ability of

文件：227.37 Kbytes 頁(yè)數(shù)：12 Pages

MOTOROLA

摩托羅拉

Security Processor

Typical System Architecture The MPC185 is designed to integrate easily into any system using the 60x bus protocol. It is ideal in any system using a Motorola PowerQUICC II communications processor (as shown in Figure 4-1) or a PowerPC-architectured processor and memory controller. The ability of

文件：227.37 Kbytes 頁(yè)數(shù)：12 Pages

MOTOROLA

摩托羅拉