Dual J-K Flip-Flops with Clear and Preset

General Description The MM74C73 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs. This flip-flop is edge sensitive to the clock

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Dual J-K Flip-Flops with Clear and Preset

文件：64.92 Kbytes 頁(yè)數(shù)：6 Pages

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Dual J-K Flip-Flops with Clear and Preset

General Description\nThe MM74C73 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs. This flip-flop is edge sensitive to the clock i ■ Supply voltage range: 3V to 15V\n■ Tenth power TTL compatible: Drive 2 LPTTL loads\n■ High noise immunity: 0.45 VCC (typ.)\n■ Low power: 50 nW (typ.)\n■ Medium speed operation: 10 MHz (typ.)Applications\n? Automotive\n? Data terminals\n? Instrumentation\n? Medical electronics\n? Alarm systems\n? I;

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Dual J-K Flip-Flops with Clear and Preset

General Description The MM74C73 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs. This flip-flop is edge sensitive to the clock

文件：85.39 Kbytes 頁(yè)數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體

Dual J-K Flip-Flops with Clear and Preset

文件：64.92 Kbytes 頁(yè)數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

Package：14-DIP（0.300"，7.62mm）；包裝：管件 功能：設(shè)置（預(yù)設(shè)）和復(fù)位 類別：集成電路（IC） 觸發(fā)器 描述：IC FF JK TYPE DUAL 1BIT 14DIP

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安森美半導(dǎo)體