Hex 3-State Inverting Buffer

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Hex 3-State Inverting Buffer with Common Enables and LSTTL Compatible Inputs

文件：153.35 Kbytes 頁數(shù)：7 Pages

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Hex 3-State Inverting Buffer

文件：131.33 Kbytes 頁數(shù)：7 Pages

ONSEMI

安森美半導體

Hex 3-State Inverting Buffer

文件：131.33 Kbytes 頁數(shù)：7 Pages

ONSEMI

安森美半導體

Hex 3-State Inverting Buffer with Common Enables and LSTTL Compatible Inputs

文件：153.35 Kbytes 頁數(shù)：7 Pages

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安森美半導體

Hex 3-State Inverting Buffer with Common Enables and LSTTL Compatible Inputs

文件：153.35 Kbytes 頁數(shù)：7 Pages

ONSEMI

安森美半導體

Hex 3-State Inverting Buffer

文件：131.33 Kbytes 頁數(shù)：7 Pages

ONSEMI

安森美半導體

Hex 3-State Inverting Buffer with Common Enables and LSTTL Compatible Inputs

文件：153.35 Kbytes 頁數(shù)：7 Pages

ONSEMI

安森美半導體

Hex 3-State Inverting Buffer

文件：131.33 Kbytes 頁數(shù)：7 Pages

ONSEMI

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六路緩沖器/線路驅(qū)動器，3 態(tài)，反相，TTL

The MC74HCT366A is identical in pinout to the LS366. The device inputs are compatible with standard CMOS or LSTTL outputs. This device is a high-speed hex buffer with 3-state outputs and two common active-low output enables. When either of the enables is high, the buffer outputs are placed into high ? Output Drive Capability: 15 LSTTL Loads\n? Outputs Directly Interface to CMOS, NMOS, and TTL\n? Operating Voltage Range: 2.0 to 6.0 V\n? Low Input Current: 1.0 A\n? High Noise Immunity Characteristic of CMOS Devices\n? In Compliance with the Requirements Defined by JEDEC Standard No. 7A\n? Chip Co;

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