Octal D Flip-Flop with Clock Enable

The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be

文件：111.52 Kbytes 頁數(shù)：12 Pages

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Octal D Flip??lop with Clock Enable

The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be

文件：122.9 Kbytes 頁數(shù)：10 Pages

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安森美半導體

Octal D Flip-Flop with Clock Enable

The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be

文件：111.52 Kbytes 頁數(shù)：12 Pages

ONSEMI

安森美半導體

Octal D Flip??lop with Clock Enable

The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be

文件：122.9 Kbytes 頁數(shù)：10 Pages

ONSEMI

安森美半導體

Package：20-SOIC（0.209"，5.30mm 寬）；包裝：卷帶（TR） 功能：標準 類別：集成電路（IC） 觸發(fā)器 描述：IC FF D-TYPE SNGL 8BIT 20SOEIAJ

ONSEMI

安森美半導體

Package：20-SOIC（0.209"，5.30mm 寬）；包裝：卷帶（TR） 功能：標準 類別：集成電路（IC） 觸發(fā)器 描述：IC FF D-TYPE SNGL 8BIT 20SOEIAJ

ONSEMI

安森美半導體