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首頁 >MC74ACT377>規(guī)格書列表

型號(hào)	下載訂購	功能描述	制造商上傳企業(yè)	LOGO
MC74ACT377	文件：111.52 Kbytes Page：12 Pages	Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be 文件：111.52 Kbytes 頁數(shù)：12 Pages	ONSEMI 安森美半導(dǎo)體	ONSEMI
MC74ACT377	文件：122.9 Kbytes Page：10 Pages	Octal D Flip??lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be 文件：122.9 Kbytes 頁數(shù)：10 Pages	ONSEMI 安森美半導(dǎo)體	ONSEMI
MC74ACT377	文件：215.5 Kbytes Page：6 Pages	OCTAL D FLIP-FLOP WITH CLOCK ENABLE The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be 文件：215.5 Kbytes 頁數(shù)：6 Pages	MOTOROLA 摩托羅拉	MOTOROLA
MC74ACT377	文件：300 bytes Page：1 Pages	OCTAL D FLIP-FLOP WITH CLOCK ENABLE The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time befo	恩XP	恩XP
MC74ACT377	文件：300 bytes Page：1 Pages	Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops withindividual D inputs and Q outputs. The common buffered Clock (CP) input loadsall flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup timebefore ? Ideal for Addressable Register Applications\n? Clock Enable for Address and Data Synchronization Applications\n? Eight Edge-Triggered D Flip-Flops\n? Buffered Common Clock\n? Outputs Source/Sink 24 mA\n? See MC74AC273 for Master Reset Version\n? See MC74AC373 for Transparent Latch Version\n? See M;	ONSEMI 安森美半導(dǎo)體	ONSEMI
MC74ACT377DT	文件：111.52 Kbytes Page：12 Pages	Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be 文件：111.52 Kbytes 頁數(shù)：12 Pages	ONSEMI 安森美半導(dǎo)體	ONSEMI
MC74ACT377DTR2	文件：111.52 Kbytes Page：12 Pages	Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be 文件：111.52 Kbytes 頁數(shù)：12 Pages	ONSEMI 安森美半導(dǎo)體	ONSEMI
MC74ACT377DW	文件：111.52 Kbytes Page：12 Pages	Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be 文件：111.52 Kbytes 頁數(shù)：12 Pages	ONSEMI 安森美半導(dǎo)體	ONSEMI
MC74ACT377DW	文件：122.9 Kbytes Page：10 Pages	Octal D Flip??lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be 文件：122.9 Kbytes 頁數(shù)：10 Pages	ONSEMI 安森美半導(dǎo)體	ONSEMI
MC74ACT377DW	文件：215.5 Kbytes Page：6 Pages	OCTAL D FLIP-FLOP WITH CLOCK ENABLE The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be 文件：215.5 Kbytes 頁數(shù)：6 Pages	MOTOROLA 摩托羅拉	MOTOROLA

技術(shù)參數(shù)

Pb-free：
Pb
Halide free：
H
Status：
Active
Type：
D-Type
Channels：
8
VCC Min (V)：
4.5
VCC Max (V)：
5.5
tpd Max (ns)：
10
IO Max (mA)：
24
Package Type：
SOIC-20W

供應(yīng)商	型號(hào)	品牌	批號(hào)	封裝	庫存	備注	價(jià)格
上海市鑫鴻達(dá)電子	MC74ACT377	MOTOROLA/摩托羅拉	2022+		76	全新原裝貨期兩周	詢價(jià)
深圳市安富世紀(jì)電子有限公司	MC74ACT377	MOTOROLA/摩托羅拉	23+	SOP20	50000	全新原裝正品現(xiàn)貨,支持訂貨	詢價(jià)
深圳市威爾健半導(dǎo)體有限公司	MC74ACT377	MOTOROLA/摩托羅拉	23+	SOP20	50000	全新原裝正品現(xiàn)貨,支持訂貨	詢價(jià)
貿(mào)澤芯城（深圳）電子科技有限公司	MC74ACT377	MOTOROLA/摩托羅拉	23+	SOP20	13000	原廠授權(quán)一級(jí)代理,專業(yè)海外優(yōu)勢訂貨,價(jià)格優(yōu)勢、品種	詢價(jià)
深圳市宏世佳電子科技有限公司	MC74ACT377	ON	2025+	SOP20	3750	全新原廠原裝產(chǎn)品、公司現(xiàn)貨銷售	詢價(jià)
深圳市一線半導(dǎo)體有限公司	MC74ACT377DW		24+		3000	公司現(xiàn)貨	詢價(jià)
芯有半導(dǎo)體（深圳）有限公司	MC74ACT377DW	MOT	05+	原廠原裝	5124	只做全新原裝真實(shí)現(xiàn)貨供應(yīng)	詢價(jià)
深圳市振宏微科技有限公司	MC74ACT377DWG	ONS	23+	NA	13650	原裝正品,假一罰百!	詢價(jià)
深圳誠思涵科技有限公司	MC74ACT377MELG	ON	18+	SOP7.2MM	85600	保證進(jìn)口原裝可開17%增值稅發(fā)票	詢價(jià)
深圳市福田區(qū)綠盛電子商行	MC74ACT377DWR2G	ONS	2018+		26976	代理原裝現(xiàn)貨/特價(jià)熱賣!	詢價(jià)

更多MC74ACT377供應(yīng)商更新時(shí)間2026-1-17 9:50:00

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