128-Bit Static Shift Register

The MC14562B is a 128–bit static shift register constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Data is clocked in and out of the shift register on the positive edge of the clock input. Data outputs are available every 16 bits, from 16 throug

文件：117.36 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導(dǎo)體

128-BIT STATIC SHIFT REGISTER

TheMC14562B is a 128–bit static shift register constructed with MOS P–channeland N–channel enhancement mode devices in a single monolithicstructure. Data is clockedin and out of the shift register on the positiveedge of the clock input. Data outputs are availableevery 16 bits, from 16 through bit

文件：187.18 Kbytes 頁數(shù)：6 Pages

MOTOROLA

摩托羅拉

128-BIT STATIC SHIFT REGISTER

TheMC14562B is a 128–bit static shift register constructed with MOS P–channeland N–channel enhancement mode devices in a single monolithicstructure. Data is clockedin and out of the shift register on the positiveedge of the clock input. Data outputs are availableevery 16 bits, from 16 through bit

文件：187.18 Kbytes 頁數(shù)：6 Pages

MOTOROLA

摩托羅拉

128-BIT STATIC SHIFT REGISTER

TheMC14562B is a 128–bit static shift register constructed with MOS P–channeland N–channel enhancement mode devices in a single monolithicstructure. Data is clockedin and out of the shift register on the positiveedge of the clock input. Data outputs are availableevery 16 bits, from 16 through bit

文件：187.18 Kbytes 頁數(shù)：6 Pages

MOTOROLA

摩托羅拉

128-Bit Static Shift Register

The MC14562B is a 128–bit static shift register constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Data is clocked in and out of the shift register on the positive edge of the clock input. Data outputs are available every 16 bits, from 16 throug

文件：117.36 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導(dǎo)體

128-BIT STATIC SHIFT REGISTER

TheMC14562B is a 128–bit static shift register constructed with MOS P–channeland N–channel enhancement mode devices in a single monolithicstructure. Data is clockedin and out of the shift register on the positiveedge of the clock input. Data outputs are availableevery 16 bits, from 16 through bit

文件：187.18 Kbytes 頁數(shù)：6 Pages

MOTOROLA

摩托羅拉

128–bit static shift register

TheMC14562B is a 128–bit static shift register constructed with MOS P–channeland N–channel enhancement mode devices in a single monolithicstructure. Data is clockedin and out of the shift register on the positiveedge of the clock input. Data outputs are availableevery 16 bits, from 16 through bit 12

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