Differential PECL to TTL Translator

Description The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of the ELT21 makes it ideal for those applications where space, performance and low pow

文件：81.27 Kbytes 頁數(shù)：3 Pages

ONSEMI

安森美半導體

5 V Differential PECL to TTL Translator

文件：138.59 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

Differential PECL to TTL Translator

The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of the ELT21 makes it ideal for those applications where space, performance and low power are at a pr

恩XP

Translator, Differential PECL to TTL

The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of the ELT21 makes it ideal for those applications where space, performanceand low power are at a premiu ? 3.5ns Typical Propagation Delay\n? 24mA TTL Output\n? Flow Through Pinouts\n? ESD Protection: > 2 KV HBM\n? Operating Range: VCC= 4.75 V to 5.25 V with GND= 0 V\n? Q Output Will Default LOW with Inputs Left Open or \n? Internal Input Pulldown Resistors\n? Meets or Exceeds JEDEC Spec EIA/JESD78 IC ;

ONSEMI

安森美半導體

5 V Differential PECL to TTL Translator

文件：138.59 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

Evaluation Board Manual for High Frequency SOIC 8

文件：202.47 Kbytes 頁數(shù)：20 Pages

ONSEMI

安森美半導體

5 V Differential PECL to TTL Translator

文件：86 Kbytes 頁數(shù)：7 Pages

ONSEMI

安森美半導體

5 V Differential PECL to TTL Translator

文件：138.59 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

5 V Differential PECL to TTL Translator

文件：138.59 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

5 V Differential PECL to TTL Translator

文件：138.59 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體