4-BIT D FLIP-FLOP

Description The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock (CC) LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE inputs LOW and using CC to

文件：104.62 Kbytes 頁數(shù)：4 Pages

ONSEMI

安森美半導體

5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

ECL 4-Bit D Flip-Flop

The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock (CC) LOW and using the Clock Enable (CEbar) inputs for clocking. Common clocking is achieved by holding the CEbar inputs LOW and using CC to clock all ? 1100MHz Min. Toggle Frequency\n? Differential Outputs\n? Individual and Common Clocks\n? Individual Resets (asynchronous)\n? Paired Sets (asynchronous)\n? PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V\n? 75kW Input Pulldown Resistors\n? NECL Mode Operating Range: VCC = 0 V with VE;

ONSEMI

安森美半導體

5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

5V ECL 4??it D Flip??lop

文件：161 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

5V ECL 4??it D Flip??lop

文件：161 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

Package：28-LCC（J 形引線）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 功能：設置（預設）和復位 類別：集成電路（IC） 觸發(fā)器 描述：IC FF D-TYPE SNGL 4BIT 28PLCC

ONSEMI

安森美半導體