1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9311/MAX9313 are low-skew, 1-to-10 differential drivers designed for clock and data distribution. These devices allow selection between two inputs. The selected input is reproduced at 10 differential outputs. The differential inputs can be adapted to accept single-ended

文件：377.93 Kbytes 頁數(shù)：12 Pages

MAXIM

美信

1:10差分LVPECL/LVECL/HSTL時鐘和數(shù)據(jù)驅(qū)動器

MAX9311/MAX9313是低扭曲，1:10差分驅(qū)動器，設(shè)計用于時鐘和數(shù)據(jù)分配。這些器件允許選擇兩路輸入之一。所選擇的輸入產(chǎn)生10路差分輸出。差分輸入經(jīng)過調(diào)整后，可以允許單端輸入，只需將片上VBB電源接到一個輸入端作為參考電壓即可。\nMAX9311/MAX9313具有較低的器件到器件扭曲(30ps)和輸出到輸出扭曲(12ps)，尤其適合于通過背板或電路板上的時鐘和數(shù)據(jù)分配。在與差分HSTL和LVPECL信號接口時，這些器件工作在+2.25V至+3.8V的電源范圍，能夠?qū)崿F(xiàn)在+2.5V或+3.3V標(biāo)稱電源的系統(tǒng)中，進(jìn)行高性能的時鐘或數(shù)據(jù)分配。與差分LVECL接口時，這些器件工作在-2.25 ·工作于+2.25V至+3.8V差分HSTL/LVPECL\n·工作于-2.25V至-3.8V LVECL\n·30ps (典型)器件到器件扭曲\n·12ps (典型)輸出至輸出扭曲\n·312ps (典型)傳輸延遲\n·在3GHz下，差分輸出≥ 300mV\n·為單端輸入提供的片上基準(zhǔn)電壓\n·開路輸入時輸出為低電平\n·引腳兼容于MC100LVEP111 (MAX9311)和MC100EP111 (MAX9313)\n·提供薄型QFN封裝(比LQFP引腳小70%);

ADI

亞德諾

1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9311/MAX9313 are low-skew, 1-to-10 differential drivers designed for clock and data distribution. These devices allow selection between two inputs. The selected input is reproduced at 10 differential outputs. The differential inputs can be adapted to accept single-ended

文件：377.93 Kbytes 頁數(shù)：12 Pages

MAXIM

美信

1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9311/MAX9313 are low-skew, 1-to-10 differential drivers designed for clock and data distribution. These devices allow selection between two inputs. The selected input is reproduced at 10 differential outputs. The differential inputs can be adapted to accept single-ended

文件：377.93 Kbytes 頁數(shù)：12 Pages

MAXIM

美信

1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9311/MAX9313 are low-skew, 1-to-10 differential drivers designed for clock and data distribution. These devices allow selection between two inputs. The selected input is reproduced at 10 differential outputs. The differential inputs can be adapted to accept single-ended

文件：377.93 Kbytes 頁數(shù)：12 Pages

MAXIM

美信

Package：32-LQFP；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 時鐘緩沖器，驅(qū)動器 描述：IC CLK BUFFER 2:10 32TQFP

AD

亞德諾