3.0V to 5.5V, 125Mbps to 266Mbps Limiting Amplifiers with Loss-of-Signal Detector

General Description The MAX3964 limiting amplifier, with 2mVP-P input sensitivity and PECL data outputs, is ideal for low-cost ATM, FDDI, and Fast Ethernet fiber optic applications. Features ? Single Supply: +3.0V to +5.5V ? 2mVP-P Input Sensitivity ? 1.2ns Output Edge Speed ? Loss-of-Signal

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MAXIM

美信

N-Channel Silicon Junction Field-Effect Transistors

Small Outline (Surface Mount) Package Devices

文件：213.13 Kbytes 頁數：10 Pages

INTERFET

N-Channel Silicon Junction Field-Effect Transistors

Small Outline (Surface Mount) Package Devices

文件：213.13 Kbytes 頁數：10 Pages

INTERFET

DUAL FULL-BRIDGE PWM MOTOR DRIVER WITH BRAKE

The A3968SA and A3968SLB are designed to bidirectionally control two dc motors. Each device includes two H-bridges capable of continuous output currents of ±650 mA and operating voltages to 30 V. Motor winding current can be controlled by the internal fixed-frequency, pulse-width modulated (PWM),

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ALLEGRO

Dual Full-Bridge PWM Motor Driver

The A3968SA and A3968SLB are designed to bidirectionally control two dc motors. Each device includes two H-bridges capable of continuous output currents of ±650 mA and operating voltages to 30 V. Motor winding current can be controlled by the internal fixed-frequency, pulse-width modulated (PWM),

文件：268.95 Kbytes 頁數：8 Pages

ALLEGRO

Dual Full-Bridge PWM Motor Driver

The A3968SA and A3968SLB are designed to bidirectionally control two dc motors. Each device includes two H-bridges capable of continuous output currents of ±650 mA and operating voltages to 30 V. Motor winding current can be controlled by the internal fixed-frequency, pulse-width modulated (PWM),

文件：269.76 Kbytes 頁數：8 Pages

ALLEGRO