2.5Gbps, 3.3V Clock and Data Retiming ICs with Vertical Threshold Adjust

文件：550.94 Kbytes 頁數(shù)：16 Pages

MAXIM

美信

2.5Gbps、+3.3V時鐘與數(shù)據(jù)再定時IC，帶有垂直調(diào)節(jié)閾值

The MAX3877/MAX3878 are compact, low-power clock recovery and data retiming ICs for 2.488Gbps SONET/ SDH applications. The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input, which is retimed by the recovered clock. An additional 2.488Gbps ser \n? Adjustable Input Threshold (±180mV) \n? 540mW Power Dissipation (at +3.3V) \n? Optional Holdover Capability (Using External Reference Clock) \n? Tolerates >2000 Consecutive Identical Digits \n? Differential PECL or CML Data and Clock Outputs \n? Loss-of-Lock Indicator;

ADI

亞德諾

2.5Gbps, 3.3V Clock and Data Retiming ICs with Vertical Threshold Adjust

文件：550.94 Kbytes 頁數(shù)：16 Pages

MAXIM

美信

Package：32-TQFP 裸露焊盤；包裝：散裝 類別：集成電路（IC） 應用特定時鐘/定時 描述：IC CLOCK/DATA RETIMING TQFP

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Package：32-TQFP 裸露焊盤；包裝：托盤 類別：集成電路（IC） 應用特定時鐘/定時 描述：IC CLOCK/DATA RETIMING 32TQFP

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亞德諾

Package：32-TQFP 裸露焊盤；包裝：散裝 類別：集成電路（IC） 應用特定時鐘/定時 描述：IC CLOCK/DATA RETIMING TQFP

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