Low Noise, Matched Dual Monolithic Transistor

PRODUCT DESCRIPTION The design of the MAT02 series of NPN dual monolithic transistors is optimized for very low noise, low drift and low rBE. Precision Monolithics’ exclusive Silicon Nitride “Triple Passivation” process stabilizes the critical device parameters over wide ranges of temperature a

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Low-noise, matched dual monolithic transistor

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Low Noise, Matched Dual Monolithic Transistor

PRODUCT DESCRIPTION The design of the MAT02 series of NPN dual monolithic transistors is optimized for very low noise, low drift and low rBE. Precision Monolithics’ exclusive Silicon Nitride “Triple Passivation” process stabilizes the critical device parameters over wide ranges of temperature a

文件：264.29 Kbytes 頁數(shù)：12 Pages

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Low Noise, Matched Dual Monolithic Transistor

PRODUCT DESCRIPTION The design of the MAT02 series of NPN dual monolithic transistors is optimized for very low noise, low drift and low rBE. Precision Monolithics’ exclusive Silicon Nitride “Triple Passivation” process stabilizes the critical device parameters over wide ranges of temperature a

文件：264.29 Kbytes 頁數(shù)：12 Pages

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Low Noise, Matched Dual Monolithic Transistor

PRODUCT DESCRIPTION The design of the MAT02 series of NPN dual monolithic transistors is optimized for very low noise, low drift and low rBE. Precision Monolithics’ exclusive Silicon Nitride “Triple Passivation” process stabilizes the critical device parameters over wide ranges of temperature a

文件：264.29 Kbytes 頁數(shù)：12 Pages

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Low Noise, Matched Dual Monolithic Transistor

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Low-noise, matched dual monolithic transistor

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This specification documents the detailed requirements

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低噪聲、雙通道匹配單芯片晶體管

此器件已經(jīng)停產(chǎn)。請(qǐng)參考MAT12。\n\nMAT02系列NPN雙通道單芯片晶體管的設(shè)計(jì)經(jīng)過優(yōu)化，提供極低噪聲、低漂移和低rBE特性。Precision Monolithics專有的氮化硅“三重鈍化”工藝使器件的關(guān)鍵參數(shù)能在寬溫度范圍和長時(shí)間內(nèi)保持穩(wěn)定。此外，MAT02能夠在寬集電極電流范圍內(nèi)保持高電流增益(hFE)。MAT02的優(yōu)異特性包括失調(diào)電壓最大值為50μV（A/E級(jí)）和150 μV（F級(jí)）。在軍用溫度范圍和25°C下能保證器件的額定性能。\n\n發(fā)射極-基極結(jié)上提供了輸入保護(hù)二極管，防止器件特性因?yàn)榘l(fā)射極電流反向偏置而下降。保護(hù)二極管形成的寄生隔離結(jié)將基板箝位在發(fā)射極較低負(fù)電壓，從而在

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Low Noise, Matched Dual Monolithic Transistor

PRODUCT DESCRIPTION\nThe design of the MAT02 series of NPN dual monolithic transistors is optimized for very low noise, low drift and low rBE. Precision Monolithics’ exclusive Silicon Nitride “Triple Passivation” process stabilizes the critical device parameters over wide ranges of temperature and e Low Offset Voltage: 50 \u0001V max\nLow Noise Voltage at 100 Hz, 1 mA: 1.0 nV/√Hz max\nHigh Gain (hFE):\n? 500 min at IC= 1 mA\n? 300 min at IC= 1 \u0001A\nExcellent Log Conformance: rBE \u0001 0.3 \u0002\nLow Offset Voltage Drift: 0.1 \u0001V/\u0003C max\nImproved Direct Replacement for LM194/394;

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