PXI High Voltage Data Acquisition Module

文件：599.11 Kbytes 頁數(shù)：7 Pages

KEYSIGHT

是德科技

Programmable DC-Balance 21-Bit Deserializers

General Description The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a sepa rate supply, all

文件：904.71 Kbytes 頁數(shù)：18 Pages

MAXIM

美信

Programmable DC-Balance 21-Bit Deserializers

General Description The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a sepa rate supply, all

文件：904.71 Kbytes 頁數(shù)：18 Pages

MAXIM

美信

Programmable DC-Balance 21-Bit Deserializers

General Description The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a sepa rate supply, all

文件：904.71 Kbytes 頁數(shù)：18 Pages

MAXIM

美信