Hex Schmitt inverter

Features High speed: tPD = 12 ns (typ.) at VCC = 6 V Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C High noise immunity: VH = 1.2 V (typ.) at VCC = 6 V Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) Balanced propagation delays: tPLH ? tPHL Wide operating voltage range: VCC (opr)

文件：723.54 Kbytes 頁數(shù)：15 Pages

STMICROELECTRONICS

意法半導體

10 TO 4 LINE PRIORITY ENCODER

DESCRIPTION The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device features priority encoding of the inputs to ensure that only the

文件：241.83 Kbytes 頁數(shù)：10 Pages

STMICROELECTRONICS

意法半導體

10 TO 4 LINE PRIORITY ENCODER

DESCRIPTION The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device features priority encoding of the inputs to ensure that only the

文件：241.83 Kbytes 頁數(shù)：10 Pages

STMICROELECTRONICS

意法半導體

10 TO 4 LINE PRIORITY ENCODER

DESCRIPTION The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device features priority encoding of the inputs to ensure that only the

文件：241.83 Kbytes 頁數(shù)：10 Pages

STMICROELECTRONICS

意法半導體

10 TO 4 LINE PRIORITY ENCODER

DESCRIPTION The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device features priority encoding of the inputs to ensure that only the

文件：241.83 Kbytes 頁數(shù)：10 Pages

STMICROELECTRONICS

意法半導體

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

文件：329.46 Kbytes 頁數(shù)：11 Pages

STMICROELECTRONICS

意法半導體

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

文件：252.34 Kbytes 頁數(shù)：11 Pages

STMICROELECTRONICS

意法半導體

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

文件：252.34 Kbytes 頁數(shù)：11 Pages

STMICROELECTRONICS

意法半導體

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

文件：329.46 Kbytes 頁數(shù)：11 Pages

STMICROELECTRONICS

意法半導體

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

文件：252.34 Kbytes 頁數(shù)：11 Pages

STMICROELECTRONICS

意法半導體