5120 x 8-BIT LINE MEMORY (FIFO)

DESCRIPTION The M66256FP is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology. It has separate clock, enable and reset signals for write and read, and is most suitable as a buffe

文件：148.36 Kbytes 頁數(shù)：11 Pages

MITSUBISHI

三菱電機(jī)

5120 x 8-BIT LINE MEMORY (FIFO)

DESCRIPTION The M66256FP is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology. It has separate clock, enable and reset signals for write and read, and is most suitable as a buffe

文件：148.36 Kbytes 頁數(shù)：11 Pages

MITSUBISHI

三菱電機(jī)

5120 ? 8-Bit Line Memory (FIFO)

Description The M66256FP is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology. It has separate clock, enable and reset signals for write and read, and is most suitable as a buffe

文件：170.55 Kbytes 頁數(shù)：14 Pages

RENESAS

瑞薩

8192 x 8-BIT LINE MEMORY

DESCRIPTION The M66258FP is high speed line memory that uses high performance silicon gate CMOS process technology and adopts the FIFO (First In First Out) structure consisting of 8192 words x 8 bits. The M66258FP, performing reading and writing operations at different cycles independently and a

文件：114.29 Kbytes 頁數(shù)：12 Pages

MITSUBISHI

三菱電機(jī)

8192 x 8-BIT LINE MEMORY

DESCRIPTION The M66258FP is high speed line memory that uses high performance silicon gate CMOS process technology and adopts the FIFO (First In First Out) structure consisting of 8192 words x 8 bits. The M66258FP, performing reading and writing operations at different cycles independently and a

文件：114.29 Kbytes 頁數(shù)：12 Pages

MITSUBISHI

三菱電機(jī)

8192 ? 8-Bit Line Memory

Description The M66258FP is high speed line memory that uses high performance silicon gate CMOS process technology and adopts the FIFO (First In First Out) structure consisting of 8192 words × 8 bits. The M66258FP, performing reading and writing operations at different cycles independently and a

文件：168.53 Kbytes 頁數(shù)：14 Pages

RENESAS

瑞薩

8 x 4 CROSSPOINT SWITCH with MIXING FUNCTION

DESCRIPTION The M66260 is an integrated circuit consisiting of a 8 × 4 cross point switch capable of selecting 32 analog switches with mixing registance respectively by serial control inputs. Using the M66260 with an external standard Op-Amp, 8 analog input signals can be mixed and output to any

文件：126.77 Kbytes 頁數(shù)：6 Pages

MITSUBISHI

三菱電機(jī)

LCD CONTROLLER with VRAM

DESCRIPTION The M66272FP is a graphic display-only controller for dot matrix type STN-LCD which is used widely for OA equipment, PDA, amusement equipment, etc. It is capable of displaying six types of LCD by combining the panel configuration(single or dual scan), LCD display function(binary or g

文件：78.32 Kbytes 頁數(shù)：4 Pages

MITSUBISHI

三菱電機(jī)

LCD CONTROLLER with VRAM

DESCRIPTION The M66272FP is a graphic display-only controller for dot matrix type STN-LCD which is used widely for OA equipment, PDA, amusement equipment, etc. It is capable of displaying six types of LCD by combining the panel configuration(single or dual scan), LCD display function(binary or g

文件：78.32 Kbytes 頁數(shù)：4 Pages

MITSUBISHI

三菱電機(jī)

LCD CONTROLLER with VRAM

DESCRIPTION The M66273 is a graphic display-only controller for dot matrix type STNLCD which is used widely for OA equipment, PDA, amusement equipment, etc. The M66273 is an advanced product from the M66272 at the point of MPU interface and timing specifications. This LCD display functions are t

文件：297.42 Kbytes 頁數(shù)：34 Pages

MITSUBISHI

三菱電機(jī)