Dual D-type Flip Flops with Preset and Clear

Description The HD74LV74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebo

文件：66.63 Kbytes 頁(yè)數(shù)：16 Pages

HITACHIHitachi Semiconductor

日立日立公司

Dual D-type flip-flop with set and reset; positive-edge trigger

DESCRIPTION The 74LV74 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT74. FEATURES ? Wide operating voltage: 1.0 to 5.5V ? Optimized for Low Voltage applications: 1.0 to 3.6V ? Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V ? Ty

文件：125.21 Kbytes 頁(yè)數(shù)：12 Pages

PHI

PHI

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：137.13 Kbytes 頁(yè)數(shù)：7 Pages

TI

德州儀器

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：444.43 Kbytes 頁(yè)數(shù)：16 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/lv74aep/marking.html">LV74AEP；Package：TSSOP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

FEATURES · Controlled Baseline – One Assembly/Test Site, One Fabrication Site · Extended Temperature Performance of– 55°C to 125°C · Enhanced Diminishing Manufacturing Sources (DMS) Support · Enhanced Product-Change Notification · Qualification Pedigree (1) · 2-V to 5.5-V VCC Operation

文件：338.42 Kbytes 頁(yè)數(shù)：15 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/lv74aep/marking.html">LV74AEP；Package：TSSOP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

FEATURES · Controlled Baseline – One Assembly/Test Site, One Fabrication Site · Extended Temperature Performance of– 55°C to 125°C · Enhanced Diminishing Manufacturing Sources (DMS) Support · Enhanced Product-Change Notification · Qualification Pedigree (1) · 2-V to 5.5-V VCC Operation

文件：338.42 Kbytes 頁(yè)數(shù)：15 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/lv74a/marking.html">LV74A；Package：SOIC；SN74LV74A-Q1 Automotive Dual Positive-Edge-Triggered D-Type Flip-Flop

1 Features ? Qualified for automotive applications ? Operation of 2-V to 5.5-V VCC ? Max tpd of 13 ns at 5 V ? Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C ? Support mixed-mode voltage operation

文件：940.84 Kbytes 頁(yè)數(shù)：21 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/lv74a/marking.html">LV74A；Package：SOIC；SN74LV74A-Q1 Automotive Dual Positive-Edge-Triggered D-Type Flip-Flop

1 Features ? Qualified for automotive applications ? Operation of 2-V to 5.5-V VCC ? Max tpd of 13 ns at 5 V ? Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C ? Support mixed-mode voltage operation

文件：940.84 Kbytes 頁(yè)數(shù)：21 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/lv74a/marking.html">LV74A；Package：SOIC；SN74LV74A-Q1 Automotive Dual Positive-Edge-Triggered D-Type Flip-Flop

1 Features ? Qualified for automotive applications ? Operation of 2-V to 5.5-V VCC ? Max tpd of 13 ns at 5 V ? Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C ? Support mixed-mode voltage operation

文件：940.84 Kbytes 頁(yè)數(shù)：21 Pages

TI

德州儀器

絲印：LV74A；Package：SOIC；SN74LV74A-Q1 Automotive Dual Positive-Edge-Triggered D-Type Flip-Flop

1 Features ? Qualified for automotive applications ? Operation of 2-V to 5.5-V VCC ? Max tpd of 13 ns at 5 V ? Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C ? Support mixed-mode voltage operation

文件：940.84 Kbytes 頁(yè)數(shù)：21 Pages

TI

德州儀器