LS647中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

Independent Registers for A and B Buses

Multiplexed Real-Time and Stored Data

Choice of True or Inverting Data Paths

Choice of 3-State or Open-Collector

Outputs

Included Among the Package Options Are

Compact 24-pin 300-mil-Wide Plastic and

Ceramic DIPs. Ceramic Chip Carriers. and

Ptastic “Small Outline” Packages

Dependable Texas Instruments Quality

and Reliability

description

These devices consist of bus transceiver circuits with

3-state or open-collector outputs, D-type flip-flops,

and control circuitry arranged for multiplexed trans-

mission of data directly from the input bus or from

the internal registers. Data on the A or B bus will be

clocked into the registers on the low-to-high transition

of the appropriate clock pin (CAB or CBA). The fol-

lowing examples demonstrate the four fundamental

bus-management functions that can be performed

with the octal bus transceivers and registers.