32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash; up to 10 kB SRAM and 4 kB EEPROM; USB device; USART

文件：1.2488 Mbytes 頁數(shù)：67 Pages

PHI

PHI

32kB閃存、8kB SRAM、LQFP64封裝

The LPC11Uxx MCU Family is an Arm? Cortex?-M0+ and Cortex-M0 based- low-cost 32-bit MCU family operating at CPU frequencies of up to 50 MHz. The LPC11Uxx MCU family is designed for 8/16-bit microcontroller operations, offering performance, low power, simple instruction set reduce code size compared System? Cortex-M0 or Cortex-M0+ processor, running at frequencies of up to 50 MHz\n? Cortex-M0 or Cortex-M0+ built-in nested vectored interrupt controller (NVIC)\n? Serial wire debug (SWD) and JTAG boundary scan modes supported\n? System tick timer;

恩XP

32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash; up to 10 kB SRAM and 4 kB EEPROM; USB device; USART

description The LPC11U2x are an ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit architectures. The L

文件：1.81564 Mbytes 頁數(shù)：74 Pages

恩XP

32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash; up to 10 kB SRAM and 4 kB EEPROM; USB device; USART

description The LPC11U2x are an ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit architectures. The L

文件：1.81564 Mbytes 頁數(shù)：74 Pages

恩XP