絲?。?a target="_blank" title="Marking" href="/lcx00/marking.html">LCX00；Package：TSSOP14B；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description ? Low-Voltage Quad 2-Input NAND Gate with 5-V Tolerant Inputs and Outputs General The 74LCX00FT is a high-performance CMOS 2-input NAND gate. Designed for use in 3.3 V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The devi

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絲?。?a target="_blank" title="Marking" href="/lcx02/marking.html">LCX02；Package：TSSOP14B；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description ? Low-Voltage Quad 2-Input NOR Gate with 5-V Tolerant Inputs and Outputs General The 74LCX02FT is a high-performance CMOS 2-input NOR gate. Designed for use in 3.3 V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device

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絲印：LCX04；Package：TSSOP14B；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description ? Low-Voltage Hex Inverter with 5-V Tolerant Inputs and Outputs General The 74LCX04FT is a high-performance CMOS inverter. Designed for use in 3.3 V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is designed for

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絲印：LCX05；Package：TSSOP14B；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description ? Low-Voltage Hex Inverter with 5-V Tolerant Inputs and Outputs (Open Drain) General The 74LCX05FT is a high-performance CMOS inverter. Designed for use in 3.3 V systems and 5 V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation.

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絲?。?a target="_blank" title="Marking" href="/lcx07/marking.html">LCX07；Package：TSSOP14B；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description ? Low-Voltage Hex Buffer with 5-V Tolerant Inputs and Outputs (Open Drain) General The 74LCX07FT is a high-performance CMOS buffer. Designed for use in 3.3 V systems and 5 V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. Th

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絲?。?a target="_blank" title="Marking" href="/lcx08/marking.html">LCX08；Package：TSSOP14B；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description ? Low-Voltage Quad 2-Input AND Gate with 5-V Tolerant Inputs and Outputs General The 74LCX08FT is a high-performance CMOS 2-input AND. Designed for use in 3.3 V systems, it achieves highspeed operation while maintaining the CMOS low power dissipation. The device is de

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絲?。?a target="_blank" title="Marking" href="/lcx125/marking.html">LCX125；Package：TSSOP14B；CMOS Digital Integrated Circuits Silicon Monolithic

General The 74LCX125FT is a high-performance CMOS quad bus buffers. Designed for use in 3.3 V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is designed for low-voltage (3.3 V) VCC applications, but it could be used to interface to 5 V sup

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絲?。?a target="_blank" title="Marking" href="/lcx125/marking.html">LCX125；Package：TSSOP14；Low-voltage CMOS quad bus buffer (3-state) with 5 V tolerant inputs and outputs

Features ■ 5 V tolerant inputs and outputs ■ High speed – tPD = 5.2 ns (max.) at VCC = 3 V ■ Power-down protection on inputs and outputs ■ Symmetrical output impedance – |IOH| = IOL = 24 mA (min.) at VCC = 3 V ■ PCI bus levels guaranteed at 24 mA ■ Balanced propagation delay – tPLH ? tPHL

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絲印：LCX125Y；Package：TSSOP14；Low-voltage CMOS quad bus buffer (3-state) with 5 V tolerant inputs and outputs

Features ■ 5 V tolerant inputs and outputs ■ High speed – tPD = 5.2 ns (max.) at VCC = 3 V ■ Power-down protection on inputs and outputs ■ Symmetrical output impedance – |IOH| = IOL = 24 mA (min.) at VCC = 3 V ■ PCI bus levels guaranteed at 24 mA ■ Balanced propagation delay – tPLH ? tPHL

文件：267.79 Kbytes 頁數(shù)：16 Pages

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絲印：LCX126；Package：TSSOP14B；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description ? Low-Voltage Quad Bus Buffer with 5-V Tolerant Inputs and Outputs General The 74LCX126FT is a high-performance CMOS quad bus buffers. Designed for use in 3.3 V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is d

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