Multiphase PWM Regulator for AMD Fusion??Mobile CPUs Using SVI 2.0

The ISL6277 is fully compliant with AMD Fusion? SVI 2.0 and provides a complete solution for microprocessor and graphics processor core power. The ISL6277 controller supports two Voltage Regulators (VRs) with three integrated gate drivers and two optional external drivers for maximum flexibili

文件：967.99 Kbytes 頁數(shù)：37 Pages

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Multiphase PWM Regulator for AMD Fusion??Mobile CPUs Using SVI 2.0

文件：1.71589 Mbytes 頁數(shù)：37 Pages

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適用于使用 SVI 的 AMD Fusion Mobile CPU 的多相 PWM 穩(wěn)壓器 2.0

The ISL6277 is fully compliant with AMD Fusion? SVI 2.0 and provides a complete solution for microprocessor and graphics processor core power. The ISL6277 controller supports two Voltage Regulators (VRs) with three integrated gate drivers and two optional external drivers for maximum flexibility. Th ? Supports AMD SVI 2.0 Serial Data Bus Interface \n? Two Dedicated Core Drivers \n? Precision Voltage Regulation \n? 0.5V to 1.55V in 6.25mV Steps \n? Supports Multiple Current Sensing Methods \n? Precision Resistor Current Sensing \n? Adaptive Body Diode Conduction Time Reduction \n? Output Current;

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Multiphase PWM Regulator for AMD CPUs Using SVI2

Features ? Supports AMD SVI 2.0 serial data bus interface ○ Serial VID clock frequency range: 100kHz to 25MHz ? Dual output controller with PWM output ? Precision voltage regulation ○ 0.5 system accuracy over-temperature ○ 0.5V to 1.55V in 6.25mV steps ○ Enhanced load-line accuracy ? Supp

文件：774.95 Kbytes 頁數(shù)：50 Pages

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絲印：62776HRTZ；Package：40LD5X5TQFN；Multiphase PWM Regulator for AMD CPUs Using SVI2

Features ? Supports AMD SVI 2.0 serial data bus interface ○ Serial VID clock frequency range: 100kHz to 25MHz ? Dual output controller with PWM output ? Precision voltage regulation ○ 0.5 system accuracy over-temperature ○ 0.5V to 1.55V in 6.25mV steps ○ Enhanced load-line accuracy ? Supp

文件：774.95 Kbytes 頁數(shù)：50 Pages

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絲?。?a target="_blank" title="Marking" href="/62776hrtz/marking.html">62776HRTZ；Package：40LD5X5TQFN；Multiphase PWM Regulator for AMD CPUs Using SVI2

Features ? Supports AMD SVI 2.0 serial data bus interface ○ Serial VID clock frequency range: 100kHz to 25MHz ? Dual output controller with PWM output ? Precision voltage regulation ○ 0.5 system accuracy over-temperature ○ 0.5V to 1.55V in 6.25mV steps ○ Enhanced load-line accuracy ? Supp

文件：774.95 Kbytes 頁數(shù)：50 Pages

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絲?。?a target="_blank" title="Marking" href="/62776irtz/marking.html">62776IRTZ；Package：40LD5X5TQFN；Multiphase PWM Regulator for AMD CPUs Using SVI2

Features ? Supports AMD SVI 2.0 serial data bus interface ○ Serial VID clock frequency range: 100kHz to 25MHz ? Dual output controller with PWM output ? Precision voltage regulation ○ 0.5 system accuracy over-temperature ○ 0.5V to 1.55V in 6.25mV steps ○ Enhanced load-line accuracy ? Supp

文件：774.95 Kbytes 頁數(shù)：50 Pages

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絲印：62776IRTZ；Package：40LD5X5TQFN；Multiphase PWM Regulator for AMD CPUs Using SVI2

Features ? Supports AMD SVI 2.0 serial data bus interface ○ Serial VID clock frequency range: 100kHz to 25MHz ? Dual output controller with PWM output ? Precision voltage regulation ○ 0.5 system accuracy over-temperature ○ 0.5V to 1.55V in 6.25mV steps ○ Enhanced load-line accuracy ? Supp

文件：774.95 Kbytes 頁數(shù)：50 Pages

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Multiphase PWM Regulator for AMD Fusion Mobile CPUs Using SVI 2.0

Features ? Supports AMD SVI 2.0 serial data bus interface - Serial VID clock frequency range 100kHz to 25MHz ? Dual output controller with integrated drivers - Two dedicated core drivers - One programmable driver for either Core or Northbridge ? Precision voltage regulation - 0.5 system acc

文件：1.75649 Mbytes 頁數(shù)：40 Pages

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Multiphase PWM Regulator for AMD Fusion Mobile CPUs Using SVI 2.0

Features ? Supports AMD SVI 2.0 serial data bus interface - Serial VID clock frequency range 100kHz to 25MHz ? Dual output controller with integrated drivers - Two dedicated core drivers - One programmable driver for either Core or Northbridge ? Precision voltage regulation - 0.5 system acc

文件：1.75649 Mbytes 頁數(shù)：40 Pages

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