General purpose (dual digital transistors)

Features 1) Two DTC323T chips in a SMT package. 2) Mounting possible with SMT3 automatic mounting machines. 3) Transistor elements are independent, eliminating interference.

文件：63.26 Kbytes 頁數(shù)：4 Pages

ROHM

羅姆

Dual Bias Resistor Transistor

Dual Bias Resistor Transistor NPN Surface Mount ? Low VCC (sat) 80 mV max at IC/IB = 50 mA/2.5 mA ? High Current: IC = 600 mA max ? Lead Free Plating

文件：23.79 Kbytes 頁數(shù)：4 Pages

ONSEMI

安森美半導(dǎo)體

Dual Bias Resistor Transistor

Dual Bias Resistor Transistor NPN Surface Mount ? Low VCC (sat) 80 mV max at IC/IB = 50 mA/2.5 mA ? High Current: IC = 600 mA max ? Lead Free Plating

文件：23.79 Kbytes 頁數(shù)：4 Pages

ONSEMI

安森美半導(dǎo)體

Dual Bias Resistor Transistor

Dual Bias Resistor Transistor NPN Surface Mount ? Low VCC (sat) 80 mV max at IC/IB = 50 mA/2.5 mA ? High Current: IC = 600 mA max ? This is a Pb?Free Device

文件：30.03 Kbytes 頁數(shù)：2 Pages

ONSEMI

安森美半導(dǎo)體

雙 NPN 雙極數(shù)字晶體管 (BRT)

This series of bipolar digital transistors is designed to replace a single device and its external resistor bias network. The bipolar digital transistor contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. This e ? Low VCC (sat) 80 mV max at IC/IB = 50 mA/2.5 mA\n? High Current: IC = 600 mA max\n? This is a Pb?Free Device;

ONSEMI

安森美半導(dǎo)體

Dual Bias Resistor Transistor

ONSEMI

安森美半導(dǎo)體