絲印：ICS601M-01LF；Package：SOIC；LOW PHASE NOISE CLOCK MULTIPLIER

Description The ICS601-01 is a low-cost, low phase noise, high-performance clock synthesizer for applications which require low phase noise and low jitter. It is IDT’s lowest phase noise multiplier, and also the lowest CMOS part in the industry. Using IDT’s patented analog and digital Phase-Locke

文件：230.01 Kbytes 頁數(shù)：9 Pages

IDT

絲印：ICS601M-01LF；Package：SOIC；LOW PHASE NOISE CLOCK MULTIPLIER

Features ? Packaged in 16-pin SOIC or TSSOP ? Pb (lead) free package ? Uses fundamental 10 - 27 MHz crystal or clock ? Patented PLL with the lowest phase noise ? Output clocks up to 156 MHz at 3.3 V ? Low phase noise: -132 dBc/Hz at 10 kHz ? Low jitter - 18 ps one sigma typ. ? Full swing C

文件：415.35 Kbytes 頁數(shù)：10 Pages

RENESAS

瑞薩

絲?。?strong>ICS601M-01LF；Package：SOIC；LOW PHASE NOISE CLOCK MULTIPLIER

Features ? Packaged in 16-pin SOIC or TSSOP ? Pb (lead) free package ? Uses fundamental 10 - 27 MHz crystal or clock ? Patented PLL with the lowest phase noise ? Output clocks up to 156 MHz at 3.3 V ? Low phase noise: -132 dBc/Hz at 10 kHz ? Low jitter - 18 ps one sigma typ. ? Full swing C

文件：415.35 Kbytes 頁數(shù)：10 Pages

RENESAS

瑞薩

絲印：ICS601M-01LF；Package：SOIC；LOW PHASE NOISE CLOCK MULTIPLIER

Description The ICS601-01 is a low-cost, low phase noise, high-performance clock synthesizer for applications which require low phase noise and low jitter. It is IDT’s lowest phase noise multiplier, and also the lowest CMOS part in the industry. Using IDT’s patented analog and digital Phase-Locke

文件：230.01 Kbytes 頁數(shù)：9 Pages

IDT

LOW PHASE NOISE CLOCK MULTIPLIER

Description The ICS601-01 is a low-cost, low phase noise, high-performance clock synthesizer for applications which require low phase noise and low jitter. It is ICS’ lowest phase noise multiplier, and also the lowest CMOS part in the industry. Using ICS’ patented analong and digital Phase-Locked

文件：176.38 Kbytes 頁數(shù)：8 Pages

ICST

LOW PHASE NOISE CLOCK MULTIPLIER

Description The ICS601-01 is a low-cost, low phase noise, high-performance clock synthesizer for applications which require low phase noise and low jitter. It is ICS’ lowest phase noise multiplier, and also the lowest CMOS part in the industry. Using ICS’ patented analong and digital Phase-Locked

文件：176.38 Kbytes 頁數(shù)：8 Pages

ICST