64M LVTTL interface SDRAM 133 MHz/100 MHz

1-Mword × 16-bit × 4-bank/2-Mword × 8-bit × 4-bank /4-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM Description The Hitachi HM5264165F is a 64-Mbit SDRAM organized as 1048576-word × 16-bit × 4 bank. The Hitachi HM5264805F is a 64-Mbit SDRAM organized as 2097152-word × 8-bit × 4 bank. The Hit

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HITACHIHitachi Semiconductor

日立日立公司

64M LVTTL interface SDRAM 133 MHz/100 MHz 1-Mword ? 16-bit ? 4-bank/2-Mword ? 8-bit ? 4-bank /4-Mword ? 4-bit ? 4-bank PC/133, PC/100 SDRAM

Description The HM5264165F is a 64-Mbit SDRAM organized as 1048576-word × 16-bit × 4 bank. The HM5264805F is a 64-Mbit SDRAM organized as 2097152-word × 8-bit × 4 bank. The HM5264405F is a 64-Mbit SDRAM organized as 4194304-word × 4-bit × 4 bank. All inputs and outputs are referred to the risin

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ELPIDA

爾必達(dá)

DIP28

HIT

上傳：諦輝(北京/上海/青島 )電子科技有限公司

DIP-28

HITACHIHitachi Semiconductor

日立日立公司

上傳：深圳市恒達(dá)億科技有限公司

DIP-32

HITACHI/日立

上傳：深圳市威爾健半導(dǎo)體有限公司