14-stage binary counter

文件：88.41 Kbytes 頁數(shù)：13 Pages

恩XP

14-stage binary counter

文件：88.41 Kbytes 頁數(shù)：13 Pages

恩XP

14-stage binary counter

文件：109.24 Kbytes 頁數(shù)：14 Pages

PHI

PHI

14-stage binary counter

文件：206.1 Kbytes 頁數(shù)：11 Pages

NEXPERIA

安世

14-stage binary counter

文件：88.41 Kbytes 頁數(shù)：13 Pages

恩XP

14-stage binary counter

文件：206.1 Kbytes 頁數(shù)：11 Pages

NEXPERIA

安世

14-stage binary counter

恩XP

14-stage binary counter

The HEF4020B is a 14-stage binary counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (Q0, and Q3 to Q13). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, in ? High speed operation\n? Fully static operation\n? 5 V, 10 V, and 15 V parametric ratings\n? Standardized symmetrical output characteristics\n? Specified from -40 oC to +85 oC\n? Complies with JEDEC standard JESD 13-B;

Nexperia

安世

14-stage binary counter

恩XP

Package：16-SOIC（0.154"，3.90mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 計數(shù)器，除法器 描述：IC 14STG BINARY COUNTER 16-SOIC

Nexperia USA Inc.