Hex D-type flip-flop

DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i

文件：62.8 Kbytes 頁數：5 Pages

PHI

PHI

Hex D-type flip-flop

DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i

文件：62.8 Kbytes 頁數：5 Pages

PHI

PHI

Hex D-type flip-flop

DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i

文件：62.8 Kbytes 頁數：5 Pages

PHI

PHI

Hex D-type flip-flop

DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i

文件：62.8 Kbytes 頁數：5 Pages

PHI

PHI