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首頁 >HEF4013B>規(guī)格書列表

型號(hào)	下載訂購	功能描述	制造商上傳企業(yè)	LOGO
HEF4013B	文件：79.33 Kbytes Page：7 Pages	Dual D-type flip-flop DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct 文件：79.33 Kbytes 頁數(shù)：7 Pages	PHI PHI	PHI
HEF4013B	文件：247.52 Kbytes Page：14 Pages	Dual D-type flip-flop 1. General description The HEF4013B is a dual D-type flip-flop with set and reset; positive-edge trigger. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. Schmitt-trigger action on the clock input makes the circuit 文件：247.52 Kbytes 頁數(shù)：14 Pages	NEXPERIA 安世	NEXPERIA
HEF4013BD	文件：79.33 Kbytes Page：7 Pages	Dual D-type flip-flop DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct 文件：79.33 Kbytes 頁數(shù)：7 Pages	PHI PHI	PHI
HEF4013BDF	文件：79.33 Kbytes Page：7 Pages	Dual D-type flip-flop DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct 文件：79.33 Kbytes 頁數(shù)：7 Pages	PHI PHI	PHI
HEF4013BF	文件：79.33 Kbytes Page：7 Pages	Dual D-type flip-flop DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct 文件：79.33 Kbytes 頁數(shù)：7 Pages	PHI PHI	PHI
HEF4013BN	文件：79.33 Kbytes Page：7 Pages	Dual D-type flip-flop DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct 文件：79.33 Kbytes 頁數(shù)：7 Pages	PHI PHI	PHI
HEF4013BP	文件：79.33 Kbytes Page：7 Pages	Dual D-type flip-flop DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct 文件：79.33 Kbytes 頁數(shù)：7 Pages	PHI PHI	PHI
HEF4013BPN	文件：79.33 Kbytes Page：7 Pages	Dual D-type flip-flop DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct 文件：79.33 Kbytes 頁數(shù)：7 Pages	PHI PHI	PHI
HEF4013BT	文件：79.33 Kbytes Page：7 Pages	Dual D-type flip-flop DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct 文件：79.33 Kbytes 頁數(shù)：7 Pages	PHI PHI	PHI
HEF4013BT	文件：247.52 Kbytes Page：14 Pages	Dual D-type flip-flop 1. General description The HEF4013B is a dual D-type flip-flop with set and reset; positive-edge trigger. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. Schmitt-trigger action on the clock input makes the circuit 文件：247.52 Kbytes 頁數(shù)：14 Pages	NEXPERIA 安世	NEXPERIA

替換型號(hào)

技術(shù)參數(shù)

VCC (V)：
3.0?-?15
Logic switching levels：
CMOS
Output drive capability (mA)：
± 2.4
tpd (ns)：
30
fmax (MHz)：
40
Power dissipation considerations：
low
Tamb (°C)：
-40~85
Rth(j-a) (K/W)：
105
Ψth(j-top) (K/W)：
18.3
Rth(j-c) (K/W)：
64
Package name：
SO14

供應(yīng)商	型號(hào)	品牌	批號(hào)	封裝	庫存	備注	價(jià)格
深圳市正納電子有限公司	HEF4013B	恩XP	23+	NA	20094	正納10年以上分銷經(jīng)驗(yàn)原裝進(jìn)口正品做服務(wù)做口碑有支持	詢價(jià)
深圳市能創(chuàng)芯電子科技有限公司	HEF4013B	恩XP	23+	SOP-14	3000	原裝正品假一罰百!可開增票!	詢價(jià)
深圳市華高宇電子有限公司	HEF4013B	恩XP	21+		6000	只做原裝正品,賣元器件不賺錢交個(gè)朋友	詢價(jià)
深圳市威雅利發(fā)展有限公司	HEF4013B	恩XP	10+	DIP14	19	一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力	詢價(jià)
深圳市賽特興科技有限公司	HEF4013B	恩XP	23+	標(biāo)準(zhǔn)封裝	6000	正規(guī)渠道,只有原裝!	詢價(jià)
深圳航星空電子技術(shù)有限公司	HEF4013B	恩XP	23+	N/A	6000	公司只做原裝，可來電咨詢	詢價(jià)
深圳深宇韜電子科技有限公司	HEF4013B	恩XP	2023+	DIP14	8800	正品渠道現(xiàn)貨終端可提供BOM表配單。	詢價(jià)
深圳市安富世紀(jì)電子有限公司	HEF4013B	PHI	23+	SOP-14	7300	專注配單,只做原裝進(jìn)口現(xiàn)貨	詢價(jià)
深圳市外芯人半導(dǎo)體有限公司	HEF4013B	恩XP	24+	N/A	20000	原裝進(jìn)口正品	詢價(jià)
深圳市眾芯源半導(dǎo)體有限公司	HEF4013B	恩XP	25+	N/A	6000	現(xiàn)貨	詢價(jià)

更多HEF4013B供應(yīng)商更新時(shí)間2026-1-23 10:46:00

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