3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver

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3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po

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Package：16-TSSOP（0.173"，4.40mm 寬）；包裝：管件 類(lèi)別：集成電路（IC） 驅(qū)動(dòng)器，接收器，收發(fā)器 描述：IC RECEIVER 0/4 16TSSOP

ONSEMI

安森美半導(dǎo)體

3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po

文件：253.43 Kbytes 頁(yè)數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

IntelliMAX??3A-Capable, Slew-Rate-Controlled Load Switch with True Reverse Current Blocking

Description The FPF1048 advanced load management switch targets applications requiring a highly integrated solution. It disconnects loads powered from the DC power rail ( Features ■ Input Voltage Operating Range: 1.5 V to 5.5 V ■ Typical RDS(ON): - 21 m? at VIN=5.5 V - 23 m? at VIN=4

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3 A-Capable, Slew-Rate-Controlled Load Switch

文件：707.14 Kbytes 頁(yè)數(shù)：14 Pages

ONSEMI

安森美半導(dǎo)體