3.3V LVDS 1-Bit High Speed Differential Driver

General Description This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dis

文件：622.19 Kbytes 頁數(shù)：8 Pages

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3.3V LVDS, 1-Bit, High-Speed Differential Driver

Description This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV, which provides low EMI at ultra-low power dissipation

文件：791.76 Kbytes 頁數(shù)：13 Pages

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3.3V LVDS 1 位高速差分驅(qū)動器

該單通道接收器專為采用低電壓差分信號(LVDS)技術(shù)進(jìn)行高速互連而設(shè)計。 該驅(qū)動器通過350mV的典型差分輸出擺幅將LVTTL信號電平轉(zhuǎn)換為LVDS電平，從而即使在高頻下也可以超低功耗提供EMI低輻射。該器件是時鐘或數(shù)據(jù)高速傳輸?shù)睦硐胫x。FIN1017可與其配套接收器FIN1018或任何其他飛兆LVDS接收器配對。 ?數(shù)據(jù)速率大于600Mbs\n?3.3V電源操作\n?0.5ns最大差分脈沖偏斜\n?1.5ns最大傳播延遲\n?低功耗\n?斷電保護(hù)\n?符合或超越TIA/EIA-644 LVDS標(biāo)準(zhǔn)\n?流通式引腳分配簡化了PCB布局\n?8引腳SOIC和US8封裝可節(jié)省空間;

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3.3V LVDS, 1-Bit, High-Speed Differential Driver

Description This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV, which provides low EMI at ultra-low power dissipation

文件：791.76 Kbytes 頁數(shù)：13 Pages

ONSEMI

安森美半導(dǎo)體

3.3V LVDS 1-Bit High Speed Differential Driver

General Description This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dis

文件：622.19 Kbytes 頁數(shù)：8 Pages

FAIRCHILD

仙童半導(dǎo)體

3.3V LVDS 1-Bit High Speed Differential Driver

General Description This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dis

文件：622.19 Kbytes 頁數(shù)：8 Pages

FAIRCHILD

仙童半導(dǎo)體

3.3V LVDS, 1-Bit, High-Speed Differential Driver

Description This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV, which provides low EMI at ultra-low power dissipation

文件：791.76 Kbytes 頁數(shù)：13 Pages

ONSEMI

安森美半導(dǎo)體

3.3V LVDS 1-Bit High Speed Differential Driver

General Description This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dis

文件：622.19 Kbytes 頁數(shù)：8 Pages

FAIRCHILD

仙童半導(dǎo)體

Package：8-VFSOP（0.091"，2.30mm 寬）；包裝：卷帶（TR） 類別：集成電路（IC） 驅(qū)動器，接收器，收發(fā)器 描述：IC DRIVER 1/0 US8

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Package：8-SOIC（0.154"，3.90mm 寬）；包裝：管件 類別：集成電路（IC） 驅(qū)動器，接收器，收發(fā)器 描述：IC DRIVER 1/0 8SOIC

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安森美半導(dǎo)體