| 型號(hào) | 下載 訂購(gòu) | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
3.3V LVDS 2-Bit High Speed Differential Receiver General Description This dual receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low pow 文件:226.19 Kbytes 頁(yè)數(shù):5 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
3.3V LVDS 2-Bit High Speed Differential Receiver General Description This dual receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low pow 文件:226.19 Kbytes 頁(yè)數(shù):5 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
3.3V LVDS 2-Bit High Speed Differential Driver General Description This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissi 文件:946.5 Kbytes 頁(yè)數(shù):12 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
3.3V LVDS 2-Bit High Speed Differential Driver General Description This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissi 文件:946.5 Kbytes 頁(yè)數(shù):12 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
3.3V LVDS 2-Bit High Speed Differential Driver General Description This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissi 文件:946.5 Kbytes 頁(yè)數(shù):12 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
3.3V LVDS 2-Bit High Speed Differential Driver General Description This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissi 文件:946.5 Kbytes 頁(yè)數(shù):12 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
3.3V LVDS 2-Bit High Speed Differential Driver General Description This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissi 文件:946.5 Kbytes 頁(yè)數(shù):12 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
3.3V LVDS 2-Bit High Speed Differential Driver General Description This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissi 文件:946.5 Kbytes 頁(yè)數(shù):12 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
3.3V LVDS 2-Bit High Speed Differential Driver General Description This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissi 文件:946.5 Kbytes 頁(yè)數(shù):12 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
3.3V LVDS 2-Bit High Speed Differential Receiver General Description This dual receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po 文件:1.027569 Mbytes 頁(yè)數(shù):9 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD |
技術(shù)參數(shù)
- Pb-free:
Pb
- Halide free:
H
- Status:
Active
- Type:
Signal Driver
- Channels:
1
- Input / Output Ratio:
1
- Input Level:
LVTTL
- Output Level:
LVDS
- VCC Typ (V):
3.3
- Package Type:
SOT-23-5
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
FAIRCHILD/仙童 |
1902+ |
SOP-16 |
2734 |
代理品牌 |
詢價(jià) | ||
FAIRCHILD/仙童 |
23+ |
BGA |
1952 |
詢價(jià) | |||
Fairchild/ON |
22+ |
32MLP |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價(jià) | ||
ON(安森美) |
23+ |
標(biāo)準(zhǔn)封裝 |
5000 |
原廠原裝現(xiàn)貨訂貨價(jià)格優(yōu)勢(shì)終端BOM表可配單提供樣品 |
詢價(jià) | ||
FAIRCHILD |
24+ |
BGA |
5645 |
公司原廠原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢(shì)庫(kù)存! |
詢價(jià) | ||
FREESCALE |
22+ |
BGA |
20000 |
絕對(duì)原裝正品現(xiàn)貨,假一罰十 |
詢價(jià) | ||
FAIRCHILD/仙童 |
25+ |
A27 |
40 |
就找我吧!--邀您體驗(yàn)愉快問(wèn)購(gòu)元件! |
詢價(jià) | ||
FAIRCHILD/仙童 |
2318+ |
TSSOP |
6859 |
十年專業(yè)專注 優(yōu)勢(shì)渠道商正品保證公司現(xiàn)貨 |
詢價(jià) | ||
FAIRCHILD/仙童 |
25+ |
TSSOP48 |
11500 |
原裝現(xiàn)貨,價(jià)格優(yōu)勢(shì) |
詢價(jià) | ||
FAIRCHILD/仙童 |
16+ |
SOP8 |
4396 |
一個(gè)電話就有貨,價(jià)格很低 |
詢價(jià) |
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