絲?。?strong>FDS6892A；Dual N-Channel Logic Level PWM Optimized PowerTrench? MOSFET

General Description These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage a

文件：180.75 Kbytes 頁數(shù)：7 Pages

ONSEMI

安森美半導體

Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET

General Description These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage a

文件：80.1 Kbytes 頁數(shù)：5 Pages

FAIRCHILD

仙童半導體

Dual N-Channel Logic Level PWM Optimized PowerTrench? MOSFET

General Description These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage a

文件：180.75 Kbytes 頁數(shù)：7 Pages

ONSEMI

安森美半導體

Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET

General Description These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage a

文件：78.83 Kbytes 頁數(shù)：5 Pages

FAIRCHILD

仙童半導體

雙N溝道邏輯電平PWM優(yōu)化PowerTrench? MOSFET

這些N溝道邏輯電平MOSFET采用飛兆半導體先進的PowerTrench工藝生產(chǎn)，這一先進工藝是專為最大限度地降低通態(tài)電阻并保持卓越開關性能而定制的。 這些器件非常適合需要線路內(nèi)低功率損耗和快速開關的低電壓和電池供電應用。 ?7.5 A, 20 V\n?RDS(ON) = 18 mΩ @ VGS = 4.5 V\n?RDS(ON) = 24 mΩ @ VGS = 2.5 V\n?低柵極電荷\n?高性能溝道技術可實現(xiàn)極低的RDS(ON)\n?高功率和高電流處理能力;

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