Peripheral Input/Output

Description The Fairchild F3861 Peripheral Input/Output (PIO) device provides two 8-bit HO ports, external interrupt, and a pro- grammable timer. An 8-bit wide bidirectional data bus transfers HO data bytes between the F3870 Central Processing Unit (CPU) and the PIO.

文件：727.7 Kbytes 頁數(shù)：12 Pages

FAIRCHILD

仙童半導(dǎo)體

Peripheral Input/Output

Description The Fairchild F3861 Peripheral Input/Output (PIO) device provides two 8-bit HO ports, external interrupt, and a pro- grammable timer. An 8-bit wide bidirectional data bus transfers HO data bytes between the F3870 Central Processing Unit (CPU) and the PIO.

文件：727.7 Kbytes 頁數(shù)：12 Pages

FAIRCHILD

仙童半導(dǎo)體

Peripheral Input/Output

Description The Fairchild F3861 Peripheral Input/Output (PIO) device provides two 8-bit HO ports, external interrupt, and a pro- grammable timer. An 8-bit wide bidirectional data bus transfers HO data bytes between the F3870 Central Processing Unit (CPU) and the PIO.

文件：727.7 Kbytes 頁數(shù)：12 Pages

FAIRCHILD

仙童半導(dǎo)體

Peripheral Input/Output

Description The Fairchild F3861 Peripheral Input/Output (PIO) device provides two 8-bit HO ports, external interrupt, and a pro- grammable timer. An 8-bit wide bidirectional data bus transfers HO data bytes between the F3870 Central Processing Unit (CPU) and the PIO.

文件：727.7 Kbytes 頁數(shù)：12 Pages

FAIRCHILD

仙童半導(dǎo)體

Direct Sequence Spread Spectrum Baseband Processor

The Intersil HFA3861 Direct Sequence Spread Spectrum (DSSS) baseband processor is part of the PRISM? 2.4GHz radio chipset, and contains all the functions necessary for a full or half duplex packet baseband transceiver. Features ? Complete DSSS Baseband Processor ? Processing Gain . . . . . . .

文件：218.65 Kbytes 頁數(shù)：35 Pages

INTERSIL