EVALZ-ADN2913開發(fā)板套件編程器的評(píng)估演示板及套件規(guī)格書PDF中文資料

EVALZ-ADN2913屬于開發(fā)板套件編程器的評(píng)估演示板及套件。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的EVALZ-ADN2913評(píng)估和演示板及套件該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過驗(yàn)證的實(shí)施環(huán)境中評(píng)估某些重點(diǎn)器件的性能或特性。評(píng)估方法通常有完善的文檔說明，并且視乎具體情況由評(píng)估軟件提供支持。產(chǎn)品通常由印刷電路板組成，板上已裝有重點(diǎn)器件以及必要或有用的支持元器件，另外也可能包括其他組件，例如電纜或電源。對(duì)于數(shù)量特別多或類別獨(dú)特的器件類別(如 ADC、DAC 和開關(guān)模式電源)，評(píng)估平臺(tái)可組合為一個(gè)單獨(dú)的產(chǎn)品系列。

FEATURES

Serial data input: 6.5 Mbps to 8.5 Gbps

No reference clock required

Exceeds SONET/SDH requirements for jitter transfer/ generation/tolerance

Quantizer sensitivity: 6.3 mV typical (limiting amplifier mode)

Optional limiting amplifier, equalizer (EQ), and 0 dB EQ inputs

Programmable jitter transfer bandwidth to support G.8251 OTN

Programmable slice level

Sample phase adjust (5.65 Gbps or greater)

Output polarity invert

Programmable LOS threshold via I2C

I2C interface to access optional features

Loss of signal (LOS) alarm (limiting amplifier mode only)

Loss of lock (LOL) indicator

PRBS generator/detector

Application aware power

352 mW at 8.5 Gbps, equalizer mode, no clock output

380 mW at 6.144 Gbps, limiting amplifier mode, no clock output

340 mW at 622 Mbps, 0 dB EQ mode, no clock output

Power supplies: 1.2 V, flexible 1.8 V to 3.3 V, and 3.3 V

4 mm × 4 mm, 24-lead LFCSP

APPLICATIONS

SONET/SDH OC-1/OC-3/OC-12/OC-48 and all associated FEC rates

1GE, 1GFC, 2GFC, 4GFC, 8GFC, CPRI OS/L.6 up to OS/L.60

Any rate regenerators/repeaters